diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2009-04-16 09:45:45 -0400 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2009-05-07 10:19:38 -0400 |
commit | f231ea441a6e4b025d971b023ff010094626fdb0 (patch) | |
tree | 1c5e0803598929aaa7fa4066054c111353cebd2a /arch/arm/mach-mx2/pcm038.c | |
parent | 60c24dc79f01edfaa14290ada39a9074050ffbcc (diff) |
pcm038: Setup all iomux pins at once
Also, remove usage of set_irq_type after request_irq.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx2/pcm038.c')
-rw-r--r-- | arch/arm/mach-mx2/pcm038.c | 167 |
1 files changed, 60 insertions, 107 deletions
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/pcm038.c index 7f3a62e2cfcc..35fb96fe933c 100644 --- a/arch/arm/mach-mx2/pcm038.c +++ b/arch/arm/mach-mx2/pcm038.c | |||
@@ -39,6 +39,63 @@ | |||
39 | 39 | ||
40 | #include "devices.h" | 40 | #include "devices.h" |
41 | 41 | ||
42 | static int pcm038_pins[] = { | ||
43 | /* UART1 */ | ||
44 | PE12_PF_UART1_TXD, | ||
45 | PE13_PF_UART1_RXD, | ||
46 | PE14_PF_UART1_CTS, | ||
47 | PE15_PF_UART1_RTS, | ||
48 | /* UART2 */ | ||
49 | PE3_PF_UART2_CTS, | ||
50 | PE4_PF_UART2_RTS, | ||
51 | PE6_PF_UART2_TXD, | ||
52 | PE7_PF_UART2_RXD, | ||
53 | /* UART3 */ | ||
54 | PE8_PF_UART3_TXD, | ||
55 | PE9_PF_UART3_RXD, | ||
56 | PE10_PF_UART3_CTS, | ||
57 | PE11_PF_UART3_RTS, | ||
58 | /* FEC */ | ||
59 | PD0_AIN_FEC_TXD0, | ||
60 | PD1_AIN_FEC_TXD1, | ||
61 | PD2_AIN_FEC_TXD2, | ||
62 | PD3_AIN_FEC_TXD3, | ||
63 | PD4_AOUT_FEC_RX_ER, | ||
64 | PD5_AOUT_FEC_RXD1, | ||
65 | PD6_AOUT_FEC_RXD2, | ||
66 | PD7_AOUT_FEC_RXD3, | ||
67 | PD8_AF_FEC_MDIO, | ||
68 | PD9_AIN_FEC_MDC, | ||
69 | PD10_AOUT_FEC_CRS, | ||
70 | PD11_AOUT_FEC_TX_CLK, | ||
71 | PD12_AOUT_FEC_RXD0, | ||
72 | PD13_AOUT_FEC_RX_DV, | ||
73 | PD14_AOUT_FEC_RX_CLK, | ||
74 | PD15_AOUT_FEC_COL, | ||
75 | PD16_AIN_FEC_TX_ER, | ||
76 | PF23_AIN_FEC_TX_EN, | ||
77 | /* I2C2 */ | ||
78 | PC5_PF_I2C2_SDA, | ||
79 | PC6_PF_I2C2_SCL, | ||
80 | /* SPI1 */ | ||
81 | PD25_PF_CSPI1_RDY, | ||
82 | PD27_PF_CSPI1_SS1, | ||
83 | PD28_PF_CSPI1_SS0, | ||
84 | PD29_PF_CSPI1_SCLK, | ||
85 | PD30_PF_CSPI1_MISO, | ||
86 | PD31_PF_CSPI1_MOSI, | ||
87 | /* SSI1 */ | ||
88 | PC20_PF_SSI1_FS, | ||
89 | PC21_PF_SSI1_RXD, | ||
90 | PC22_PF_SSI1_TXD, | ||
91 | PC23_PF_SSI1_CLK, | ||
92 | /* SSI4 */ | ||
93 | PC16_PF_SSI4_FS, | ||
94 | PC17_PF_SSI4_RXD, | ||
95 | PC18_PF_SSI4_TXD, | ||
96 | PC19_PF_SSI4_CLK, | ||
97 | }; | ||
98 | |||
42 | /* | 99 | /* |
43 | * Phytec's PCM038 comes with 2MiB battery buffered SRAM, | 100 | * Phytec's PCM038 comes with 2MiB battery buffered SRAM, |
44 | * 16 bit width | 101 | * 16 bit width |
@@ -88,104 +145,16 @@ static struct platform_device pcm038_nor_mtd_device = { | |||
88 | .resource = &pcm038_flash_resource, | 145 | .resource = &pcm038_flash_resource, |
89 | }; | 146 | }; |
90 | 147 | ||
91 | static int mxc_uart0_pins[] = { | ||
92 | PE12_PF_UART1_TXD, | ||
93 | PE13_PF_UART1_RXD, | ||
94 | PE14_PF_UART1_CTS, | ||
95 | PE15_PF_UART1_RTS | ||
96 | }; | ||
97 | |||
98 | static int uart_mxc_port0_init(struct platform_device *pdev) | ||
99 | { | ||
100 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, | ||
101 | ARRAY_SIZE(mxc_uart0_pins), "UART0"); | ||
102 | } | ||
103 | |||
104 | static void uart_mxc_port0_exit(struct platform_device *pdev) | ||
105 | { | ||
106 | mxc_gpio_release_multiple_pins(mxc_uart0_pins, | ||
107 | ARRAY_SIZE(mxc_uart0_pins)); | ||
108 | } | ||
109 | |||
110 | static int mxc_uart1_pins[] = { | ||
111 | PE3_PF_UART2_CTS, | ||
112 | PE4_PF_UART2_RTS, | ||
113 | PE6_PF_UART2_TXD, | ||
114 | PE7_PF_UART2_RXD | ||
115 | }; | ||
116 | |||
117 | static int uart_mxc_port1_init(struct platform_device *pdev) | ||
118 | { | ||
119 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, | ||
120 | ARRAY_SIZE(mxc_uart1_pins), "UART1"); | ||
121 | } | ||
122 | |||
123 | static void uart_mxc_port1_exit(struct platform_device *pdev) | ||
124 | { | ||
125 | mxc_gpio_release_multiple_pins(mxc_uart1_pins, | ||
126 | ARRAY_SIZE(mxc_uart1_pins)); | ||
127 | } | ||
128 | |||
129 | static int mxc_uart2_pins[] = { PE8_PF_UART3_TXD, | ||
130 | PE9_PF_UART3_RXD, | ||
131 | PE10_PF_UART3_CTS, | ||
132 | PE11_PF_UART3_RTS }; | ||
133 | |||
134 | static int uart_mxc_port2_init(struct platform_device *pdev) | ||
135 | { | ||
136 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, | ||
137 | ARRAY_SIZE(mxc_uart2_pins), "UART2"); | ||
138 | } | ||
139 | |||
140 | static void uart_mxc_port2_exit(struct platform_device *pdev) | ||
141 | { | ||
142 | mxc_gpio_release_multiple_pins(mxc_uart2_pins, | ||
143 | ARRAY_SIZE(mxc_uart2_pins)); | ||
144 | } | ||
145 | |||
146 | static struct imxuart_platform_data uart_pdata[] = { | 148 | static struct imxuart_platform_data uart_pdata[] = { |
147 | { | 149 | { |
148 | .init = uart_mxc_port0_init, | ||
149 | .exit = uart_mxc_port0_exit, | ||
150 | .flags = IMXUART_HAVE_RTSCTS, | 150 | .flags = IMXUART_HAVE_RTSCTS, |
151 | }, { | 151 | }, { |
152 | .init = uart_mxc_port1_init, | ||
153 | .exit = uart_mxc_port1_exit, | ||
154 | .flags = IMXUART_HAVE_RTSCTS, | 152 | .flags = IMXUART_HAVE_RTSCTS, |
155 | }, { | 153 | }, { |
156 | .init = uart_mxc_port2_init, | ||
157 | .exit = uart_mxc_port2_exit, | ||
158 | .flags = IMXUART_HAVE_RTSCTS, | 154 | .flags = IMXUART_HAVE_RTSCTS, |
159 | }, | 155 | }, |
160 | }; | 156 | }; |
161 | 157 | ||
162 | static int mxc_fec_pins[] = { | ||
163 | PD0_AIN_FEC_TXD0, | ||
164 | PD1_AIN_FEC_TXD1, | ||
165 | PD2_AIN_FEC_TXD2, | ||
166 | PD3_AIN_FEC_TXD3, | ||
167 | PD4_AOUT_FEC_RX_ER, | ||
168 | PD5_AOUT_FEC_RXD1, | ||
169 | PD6_AOUT_FEC_RXD2, | ||
170 | PD7_AOUT_FEC_RXD3, | ||
171 | PD8_AF_FEC_MDIO, | ||
172 | PD9_AIN_FEC_MDC, | ||
173 | PD10_AOUT_FEC_CRS, | ||
174 | PD11_AOUT_FEC_TX_CLK, | ||
175 | PD12_AOUT_FEC_RXD0, | ||
176 | PD13_AOUT_FEC_RX_DV, | ||
177 | PD14_AOUT_FEC_RX_CLK, | ||
178 | PD15_AOUT_FEC_COL, | ||
179 | PD16_AIN_FEC_TX_ER, | ||
180 | PF23_AIN_FEC_TX_EN | ||
181 | }; | ||
182 | |||
183 | static void gpio_fec_active(void) | ||
184 | { | ||
185 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, | ||
186 | ARRAY_SIZE(mxc_fec_pins), "FEC"); | ||
187 | } | ||
188 | |||
189 | static struct mxc_nand_platform_data pcm038_nand_board_info = { | 158 | static struct mxc_nand_platform_data pcm038_nand_board_info = { |
190 | .width = 1, | 159 | .width = 1, |
191 | .hw_ecc = 1, | 160 | .hw_ecc = 1, |
@@ -208,26 +177,8 @@ static void __init pcm038_init_sram(void) | |||
208 | } | 177 | } |
209 | 178 | ||
210 | #ifdef CONFIG_I2C_IMX | 179 | #ifdef CONFIG_I2C_IMX |
211 | static int mxc_i2c1_pins[] = { | ||
212 | PC5_PF_I2C2_SDA, | ||
213 | PC6_PF_I2C2_SCL | ||
214 | }; | ||
215 | |||
216 | static int pcm038_i2c_1_init(struct device *dev) | ||
217 | { | ||
218 | return mxc_gpio_setup_multiple_pins(mxc_i2c1_pins, ARRAY_SIZE(mxc_i2c1_pins), | ||
219 | "I2C1"); | ||
220 | } | ||
221 | |||
222 | static void pcm038_i2c_1_exit(struct device *dev) | ||
223 | { | ||
224 | mxc_gpio_release_multiple_pins(mxc_i2c1_pins, ARRAY_SIZE(mxc_i2c1_pins)); | ||
225 | } | ||
226 | |||
227 | static struct imxi2c_platform_data pcm038_i2c_1_data = { | 180 | static struct imxi2c_platform_data pcm038_i2c_1_data = { |
228 | .bitrate = 100000, | 181 | .bitrate = 100000, |
229 | .init = pcm038_i2c_1_init, | ||
230 | .exit = pcm038_i2c_1_exit, | ||
231 | }; | 182 | }; |
232 | 183 | ||
233 | static struct at24_platform_data board_eeprom = { | 184 | static struct at24_platform_data board_eeprom = { |
@@ -254,7 +205,9 @@ static struct i2c_board_info pcm038_i2c_devices[] = { | |||
254 | 205 | ||
255 | static void __init pcm038_init(void) | 206 | static void __init pcm038_init(void) |
256 | { | 207 | { |
257 | gpio_fec_active(); | 208 | mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins), |
209 | "PCM038"); | ||
210 | |||
258 | pcm038_init_sram(); | 211 | pcm038_init_sram(); |
259 | 212 | ||
260 | mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); | 213 | mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); |