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authorLinus Torvalds <torvalds@linux-foundation.org>2009-03-28 17:03:14 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-03-28 17:03:14 -0400
commit0fe41b8982001cd14ee2c77cd776735a5024e98b (patch)
tree83e65d595c413d55259ea14fb97748ce5efe5707 /arch/arm/mach-mx2/devices.c
parenteedf2c5296a8dfaaf9aec1a938c1d3bd73159a30 (diff)
parent9759d22c8348343b0da4e25d6150c41712686c14 (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (422 commits) [ARM] 5435/1: fix compile warning in sanity_check_meminfo() [ARM] 5434/1: ARM: OMAP: Fix mailbox compile for 24xx [ARM] pxa: fix the bad assumption that PCMCIA sockets always start with 0 [ARM] pxa: fix Colibri PXA300 and PXA320 LCD backlight pins imxfb: Fix TFT mode i.MX21/27: remove ifdef CONFIG_FB_IMX imxfb: add clock support mxc: add arch_reset() function clkdev: add possibility to get a clock based on the device name i.MX1: remove fb support from mach-imx [ARM] pxa: build arch/arm/plat-pxa/mfp.c only when PXA3xx or ARCH_MMP defined Gemini: Add support for Teltonika RUT100 Gemini: gpiolib based GPIO support v2 MAINTAINERS: add myself as Gemini architecture maintainer ARM: Add Gemini architecture v3 [ARM] OMAP: Fix compile for omap2_init_common_hw() MAINTAINERS: Add myself as Faraday ARM core variant maintainer ARM: Add support for FA526 v2 [ARM] acorn,ebsa110,footbridge,integrator,sa1100: Convert asm/io.h to linux/io.h [ARM] collie: fix two minor formatting nits ...
Diffstat (limited to 'arch/arm/mach-mx2/devices.c')
-rw-r--r--arch/arm/mach-mx2/devices.c194
1 files changed, 188 insertions, 6 deletions
diff --git a/arch/arm/mach-mx2/devices.c b/arch/arm/mach-mx2/devices.c
index 2f9240be1c76..a0f1b3674327 100644
--- a/arch/arm/mach-mx2/devices.c
+++ b/arch/arm/mach-mx2/devices.c
@@ -34,6 +34,10 @@
34 34
35#include <mach/irqs.h> 35#include <mach/irqs.h>
36#include <mach/hardware.h> 36#include <mach/hardware.h>
37#include <mach/common.h>
38#include <mach/mmc.h>
39
40#include "devices.h"
37 41
38/* 42/*
39 * Resource definition for the MXC IrDA 43 * Resource definition for the MXC IrDA
@@ -225,37 +229,215 @@ struct platform_device mxc_nand_device = {
225 .resource = mxc_nand_resources, 229 .resource = mxc_nand_resources,
226}; 230};
227 231
232/*
233 * lcdc:
234 * - i.MX1: the basic controller
235 * - i.MX21: to be checked
236 * - i.MX27: like i.MX1, with slightly variations
237 */
238static struct resource mxc_fb[] = {
239 {
240 .start = LCDC_BASE_ADDR,
241 .end = LCDC_BASE_ADDR + 0xFFF,
242 .flags = IORESOURCE_MEM,
243 },
244 {
245 .start = MXC_INT_LCDC,
246 .end = MXC_INT_LCDC,
247 .flags = IORESOURCE_IRQ,
248 }
249};
250
251/* mxc lcd driver */
252struct platform_device mxc_fb_device = {
253 .name = "imx-fb",
254 .id = 0,
255 .num_resources = ARRAY_SIZE(mxc_fb),
256 .resource = mxc_fb,
257 .dev = {
258 .coherent_dma_mask = 0xFFFFFFFF,
259 },
260};
261
262#ifdef CONFIG_MACH_MX27
263static struct resource mxc_fec_resources[] = {
264 {
265 .start = FEC_BASE_ADDR,
266 .end = FEC_BASE_ADDR + 0xfff,
267 .flags = IORESOURCE_MEM
268 }, {
269 .start = MXC_INT_FEC,
270 .end = MXC_INT_FEC,
271 .flags = IORESOURCE_IRQ
272 },
273};
274
275struct platform_device mxc_fec_device = {
276 .name = "fec",
277 .id = 0,
278 .num_resources = ARRAY_SIZE(mxc_fec_resources),
279 .resource = mxc_fec_resources,
280};
281#endif
282
283static struct resource mxc_i2c_1_resources[] = {
284 [0] = {
285 .start = I2C_BASE_ADDR,
286 .end = I2C_BASE_ADDR + 0x0fff,
287 .flags = IORESOURCE_MEM
288 },
289 [1] = {
290 .start = MXC_INT_I2C,
291 .end = MXC_INT_I2C,
292 .flags = IORESOURCE_IRQ
293 }
294};
295
296struct platform_device mxc_i2c_device0 = {
297 .name = "imx-i2c",
298 .id = 0,
299 .num_resources = ARRAY_SIZE(mxc_i2c_1_resources),
300 .resource = mxc_i2c_1_resources
301};
302
303#ifdef CONFIG_MACH_MX27
304static struct resource mxc_i2c_2_resources[] = {
305 [0] = {
306 .start = I2C2_BASE_ADDR,
307 .end = I2C2_BASE_ADDR + 0x0fff,
308 .flags = IORESOURCE_MEM
309 },
310 [1] = {
311 .start = MXC_INT_I2C2,
312 .end = MXC_INT_I2C2,
313 .flags = IORESOURCE_IRQ
314 }
315};
316
317struct platform_device mxc_i2c_device1 = {
318 .name = "imx-i2c",
319 .id = 1,
320 .num_resources = ARRAY_SIZE(mxc_i2c_2_resources),
321 .resource = mxc_i2c_2_resources
322};
323#endif
324
325static struct resource mxc_pwm_resources[] = {
326 [0] = {
327 .start = PWM_BASE_ADDR,
328 .end = PWM_BASE_ADDR + 0x0fff,
329 .flags = IORESOURCE_MEM
330 },
331 [1] = {
332 .start = MXC_INT_PWM,
333 .end = MXC_INT_PWM,
334 .flags = IORESOURCE_IRQ,
335 }
336};
337
338struct platform_device mxc_pwm_device = {
339 .name = "mxc_pwm",
340 .id = 0,
341 .num_resources = ARRAY_SIZE(mxc_pwm_resources),
342 .resource = mxc_pwm_resources
343};
344
345/*
346 * Resource definition for the MXC SDHC
347 */
348static struct resource mxc_sdhc1_resources[] = {
349 [0] = {
350 .start = SDHC1_BASE_ADDR,
351 .end = SDHC1_BASE_ADDR + SZ_4K - 1,
352 .flags = IORESOURCE_MEM,
353 },
354 [1] = {
355 .start = MXC_INT_SDHC1,
356 .end = MXC_INT_SDHC1,
357 .flags = IORESOURCE_IRQ,
358 },
359 [2] = {
360 .start = DMA_REQ_SDHC1,
361 .end = DMA_REQ_SDHC1,
362 .flags = IORESOURCE_DMA
363 },
364};
365
366static u64 mxc_sdhc1_dmamask = 0xffffffffUL;
367
368struct platform_device mxc_sdhc_device0 = {
369 .name = "mxc-mmc",
370 .id = 0,
371 .dev = {
372 .dma_mask = &mxc_sdhc1_dmamask,
373 .coherent_dma_mask = 0xffffffff,
374 },
375 .num_resources = ARRAY_SIZE(mxc_sdhc1_resources),
376 .resource = mxc_sdhc1_resources,
377};
378
379static struct resource mxc_sdhc2_resources[] = {
380 [0] = {
381 .start = SDHC2_BASE_ADDR,
382 .end = SDHC2_BASE_ADDR + SZ_4K - 1,
383 .flags = IORESOURCE_MEM,
384 },
385 [1] = {
386 .start = MXC_INT_SDHC2,
387 .end = MXC_INT_SDHC2,
388 .flags = IORESOURCE_IRQ,
389 },
390 [2] = {
391 .start = DMA_REQ_SDHC2,
392 .end = DMA_REQ_SDHC2,
393 .flags = IORESOURCE_DMA
394 },
395};
396
397static u64 mxc_sdhc2_dmamask = 0xffffffffUL;
398
399struct platform_device mxc_sdhc_device1 = {
400 .name = "mxc-mmc",
401 .id = 1,
402 .dev = {
403 .dma_mask = &mxc_sdhc2_dmamask,
404 .coherent_dma_mask = 0xffffffff,
405 },
406 .num_resources = ARRAY_SIZE(mxc_sdhc2_resources),
407 .resource = mxc_sdhc2_resources,
408};
409
228/* GPIO port description */ 410/* GPIO port description */
229static struct mxc_gpio_port imx_gpio_ports[] = { 411static struct mxc_gpio_port imx_gpio_ports[] = {
230 [0] = { 412 [0] = {
231 .chip.label = "gpio-0", 413 .chip.label = "gpio-0",
232 .irq = MXC_INT_GPIO, 414 .irq = MXC_INT_GPIO,
233 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 0), 415 .base = IO_ADDRESS(GPIO_BASE_ADDR),
234 .virtual_irq_start = MXC_GPIO_IRQ_START, 416 .virtual_irq_start = MXC_GPIO_IRQ_START,
235 }, 417 },
236 [1] = { 418 [1] = {
237 .chip.label = "gpio-1", 419 .chip.label = "gpio-1",
238 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 1), 420 .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x100),
239 .virtual_irq_start = MXC_GPIO_IRQ_START + 32, 421 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
240 }, 422 },
241 [2] = { 423 [2] = {
242 .chip.label = "gpio-2", 424 .chip.label = "gpio-2",
243 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 2), 425 .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x200),
244 .virtual_irq_start = MXC_GPIO_IRQ_START + 64, 426 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
245 }, 427 },
246 [3] = { 428 [3] = {
247 .chip.label = "gpio-3", 429 .chip.label = "gpio-3",
248 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 3), 430 .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x300),
249 .virtual_irq_start = MXC_GPIO_IRQ_START + 96, 431 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
250 }, 432 },
251 [4] = { 433 [4] = {
252 .chip.label = "gpio-4", 434 .chip.label = "gpio-4",
253 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 4), 435 .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x400),
254 .virtual_irq_start = MXC_GPIO_IRQ_START + 128, 436 .virtual_irq_start = MXC_GPIO_IRQ_START + 128,
255 }, 437 },
256 [5] = { 438 [5] = {
257 .chip.label = "gpio-5", 439 .chip.label = "gpio-5",
258 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 5), 440 .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x500),
259 .virtual_irq_start = MXC_GPIO_IRQ_START + 160, 441 .virtual_irq_start = MXC_GPIO_IRQ_START + 160,
260 } 442 }
261}; 443};