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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-07-31 09:20:16 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-07-31 09:20:16 -0400
commit7b70c4275f28702b76b273c8534c38f8313812e9 (patch)
tree1df2229ca02466bd1adda814ac5c37aa0a597db1 /arch/arm/mach-mx1
parentceb0885d3b01bb2e2f18765770e212914f2864be (diff)
parenta20df564d15bd28e3df24e1c65b885bd74d23f17 (diff)
Merge branch 'devel-stable' into devel
Conflicts: arch/arm/kernel/entry-armv.S arch/arm/kernel/setup.c arch/arm/mm/init.c
Diffstat (limited to 'arch/arm/mach-mx1')
-rw-r--r--arch/arm/mach-mx1/Kconfig19
-rw-r--r--arch/arm/mach-mx1/Makefile15
-rw-r--r--arch/arm/mach-mx1/Makefile.boot4
-rw-r--r--arch/arm/mach-mx1/clock.c602
-rw-r--r--arch/arm/mach-mx1/crm_regs.h55
-rw-r--r--arch/arm/mach-mx1/devices.c242
-rw-r--r--arch/arm/mach-mx1/devices.h7
-rw-r--r--arch/arm/mach-mx1/generic.c53
-rw-r--r--arch/arm/mach-mx1/ksym_mx1.c18
-rw-r--r--arch/arm/mach-mx1/mach-mx1ads.c165
-rw-r--r--arch/arm/mach-mx1/mach-scb9328.c158
-rw-r--r--arch/arm/mach-mx1/mx1_camera_fiq.S35
12 files changed, 0 insertions, 1373 deletions
diff --git a/arch/arm/mach-mx1/Kconfig b/arch/arm/mach-mx1/Kconfig
deleted file mode 100644
index eb7660f5d4b7..000000000000
--- a/arch/arm/mach-mx1/Kconfig
+++ /dev/null
@@ -1,19 +0,0 @@
1if ARCH_MX1
2
3comment "MX1 platforms:"
4
5config MACH_MXLADS
6 bool
7
8config ARCH_MX1ADS
9 bool "MX1ADS platform"
10 select MACH_MXLADS
11 help
12 Say Y here if you are using Motorola MX1ADS/MXLADS boards
13
14config MACH_SCB9328
15 bool "Synertronixx scb9328"
16 help
17 Say Y here if you are using a Synertronixx scb9328 board
18
19endif
diff --git a/arch/arm/mach-mx1/Makefile b/arch/arm/mach-mx1/Makefile
deleted file mode 100644
index fc2ddf82441b..000000000000
--- a/arch/arm/mach-mx1/Makefile
+++ /dev/null
@@ -1,15 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5# Object file lists.
6
7EXTRA_CFLAGS += -DIMX_NEEDS_DEPRECATED_SYMBOLS
8obj-y += generic.o clock.o devices.o
9
10# Support for CMOS sensor interface
11obj-$(CONFIG_MX1_VIDEO) += ksym_mx1.o mx1_camera_fiq.o
12
13# Specific board support
14obj-$(CONFIG_ARCH_MX1ADS) += mach-mx1ads.o
15obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.o
diff --git a/arch/arm/mach-mx1/Makefile.boot b/arch/arm/mach-mx1/Makefile.boot
deleted file mode 100644
index 8ed1492288a2..000000000000
--- a/arch/arm/mach-mx1/Makefile.boot
+++ /dev/null
@@ -1,4 +0,0 @@
1 zreladdr-y := 0x08008000
2params_phys-y := 0x08000100
3initrd_phys-y := 0x08800000
4
diff --git a/arch/arm/mach-mx1/clock.c b/arch/arm/mach-mx1/clock.c
deleted file mode 100644
index 6cf2d4a7511d..000000000000
--- a/arch/arm/mach-mx1/clock.c
+++ /dev/null
@@ -1,602 +0,0 @@
1/*
2 * Copyright (C) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/list.h>
22#include <linux/math64.h>
23#include <linux/err.h>
24#include <linux/clk.h>
25#include <linux/io.h>
26
27#include <asm/clkdev.h>
28
29#include <mach/clock.h>
30#include <mach/hardware.h>
31#include <mach/common.h>
32#include "crm_regs.h"
33
34static int _clk_enable(struct clk *clk)
35{
36 unsigned int reg;
37
38 reg = __raw_readl(clk->enable_reg);
39 reg |= 1 << clk->enable_shift;
40 __raw_writel(reg, clk->enable_reg);
41
42 return 0;
43}
44
45static void _clk_disable(struct clk *clk)
46{
47 unsigned int reg;
48
49 reg = __raw_readl(clk->enable_reg);
50 reg &= ~(1 << clk->enable_shift);
51 __raw_writel(reg, clk->enable_reg);
52}
53
54static int _clk_can_use_parent(const struct clk *clk_arr[], unsigned int size,
55 struct clk *parent)
56{
57 int i;
58
59 for (i = 0; i < size; i++)
60 if (parent == clk_arr[i])
61 return i;
62
63 return -EINVAL;
64}
65
66static unsigned long
67_clk_simple_round_rate(struct clk *clk, unsigned long rate, unsigned int limit)
68{
69 int div;
70 unsigned long parent_rate;
71
72 parent_rate = clk_get_rate(clk->parent);
73
74 div = parent_rate / rate;
75 if (parent_rate % rate)
76 div++;
77
78 if (div > limit)
79 div = limit;
80
81 return parent_rate / div;
82}
83
84static unsigned long _clk_parent_round_rate(struct clk *clk, unsigned long rate)
85{
86 return clk->parent->round_rate(clk->parent, rate);
87}
88
89static int _clk_parent_set_rate(struct clk *clk, unsigned long rate)
90{
91 return clk->parent->set_rate(clk->parent, rate);
92}
93
94static unsigned long clk16m_get_rate(struct clk *clk)
95{
96 return 16000000;
97}
98
99static struct clk clk16m = {
100 .get_rate = clk16m_get_rate,
101 .enable = _clk_enable,
102 .enable_reg = CCM_CSCR,
103 .enable_shift = CCM_CSCR_OSC_EN_SHIFT,
104 .disable = _clk_disable,
105};
106
107/* in Hz */
108static unsigned long clk32_rate;
109
110static unsigned long clk32_get_rate(struct clk *clk)
111{
112 return clk32_rate;
113}
114
115static struct clk clk32 = {
116 .get_rate = clk32_get_rate,
117};
118
119static unsigned long clk32_premult_get_rate(struct clk *clk)
120{
121 return clk_get_rate(clk->parent) * 512;
122}
123
124static struct clk clk32_premult = {
125 .parent = &clk32,
126 .get_rate = clk32_premult_get_rate,
127};
128
129static const struct clk *prem_clk_clocks[] = {
130 &clk32_premult,
131 &clk16m,
132};
133
134static int prem_clk_set_parent(struct clk *clk, struct clk *parent)
135{
136 int i;
137 unsigned int reg = __raw_readl(CCM_CSCR);
138
139 i = _clk_can_use_parent(prem_clk_clocks, ARRAY_SIZE(prem_clk_clocks),
140 parent);
141
142 switch (i) {
143 case 0:
144 reg &= ~CCM_CSCR_SYSTEM_SEL;
145 break;
146 case 1:
147 reg |= CCM_CSCR_SYSTEM_SEL;
148 break;
149 default:
150 return i;
151 }
152
153 __raw_writel(reg, CCM_CSCR);
154
155 return 0;
156}
157
158static struct clk prem_clk = {
159 .set_parent = prem_clk_set_parent,
160};
161
162static unsigned long system_clk_get_rate(struct clk *clk)
163{
164 return mxc_decode_pll(__raw_readl(CCM_SPCTL0),
165 clk_get_rate(clk->parent));
166}
167
168static struct clk system_clk = {
169 .parent = &prem_clk,
170 .get_rate = system_clk_get_rate,
171};
172
173static unsigned long mcu_clk_get_rate(struct clk *clk)
174{
175 return mxc_decode_pll(__raw_readl(CCM_MPCTL0),
176 clk_get_rate(clk->parent));
177}
178
179static struct clk mcu_clk = {
180 .parent = &clk32_premult,
181 .get_rate = mcu_clk_get_rate,
182};
183
184static unsigned long fclk_get_rate(struct clk *clk)
185{
186 unsigned long fclk = clk_get_rate(clk->parent);
187
188 if (__raw_readl(CCM_CSCR) & CCM_CSCR_PRESC)
189 fclk /= 2;
190
191 return fclk;
192}
193
194static struct clk fclk = {
195 .parent = &mcu_clk,
196 .get_rate = fclk_get_rate,
197};
198
199/*
200 * get hclk ( SDRAM, CSI, Memory Stick, I2C, DMA )
201 */
202static unsigned long hclk_get_rate(struct clk *clk)
203{
204 return clk_get_rate(clk->parent) / (((__raw_readl(CCM_CSCR) &
205 CCM_CSCR_BCLK_MASK) >> CCM_CSCR_BCLK_OFFSET) + 1);
206}
207
208static unsigned long hclk_round_rate(struct clk *clk, unsigned long rate)
209{
210 return _clk_simple_round_rate(clk, rate, 16);
211}
212
213static int hclk_set_rate(struct clk *clk, unsigned long rate)
214{
215 unsigned int div;
216 unsigned int reg;
217 unsigned long parent_rate;
218
219 parent_rate = clk_get_rate(clk->parent);
220
221 div = parent_rate / rate;
222
223 if (div > 16 || div < 1 || ((parent_rate / div) != rate))
224 return -EINVAL;
225
226 div--;
227
228 reg = __raw_readl(CCM_CSCR);
229 reg &= ~CCM_CSCR_BCLK_MASK;
230 reg |= div << CCM_CSCR_BCLK_OFFSET;
231 __raw_writel(reg, CCM_CSCR);
232
233 return 0;
234}
235
236static struct clk hclk = {
237 .parent = &system_clk,
238 .get_rate = hclk_get_rate,
239 .round_rate = hclk_round_rate,
240 .set_rate = hclk_set_rate,
241};
242
243static unsigned long clk48m_get_rate(struct clk *clk)
244{
245 return clk_get_rate(clk->parent) / (((__raw_readl(CCM_CSCR) &
246 CCM_CSCR_USB_MASK) >> CCM_CSCR_USB_OFFSET) + 1);
247}
248
249static unsigned long clk48m_round_rate(struct clk *clk, unsigned long rate)
250{
251 return _clk_simple_round_rate(clk, rate, 8);
252}
253
254static int clk48m_set_rate(struct clk *clk, unsigned long rate)
255{
256 unsigned int div;
257 unsigned int reg;
258 unsigned long parent_rate;
259
260 parent_rate = clk_get_rate(clk->parent);
261
262 div = parent_rate / rate;
263
264 if (div > 8 || div < 1 || ((parent_rate / div) != rate))
265 return -EINVAL;
266
267 div--;
268
269 reg = __raw_readl(CCM_CSCR);
270 reg &= ~CCM_CSCR_USB_MASK;
271 reg |= div << CCM_CSCR_USB_OFFSET;
272 __raw_writel(reg, CCM_CSCR);
273
274 return 0;
275}
276
277static struct clk clk48m = {
278 .parent = &system_clk,
279 .get_rate = clk48m_get_rate,
280 .round_rate = clk48m_round_rate,
281 .set_rate = clk48m_set_rate,
282};
283
284/*
285 * get peripheral clock 1 ( UART[12], Timer[12], PWM )
286 */
287static unsigned long perclk1_get_rate(struct clk *clk)
288{
289 return clk_get_rate(clk->parent) / (((__raw_readl(CCM_PCDR) &
290 CCM_PCDR_PCLK1_MASK) >> CCM_PCDR_PCLK1_OFFSET) + 1);
291}
292
293static unsigned long perclk1_round_rate(struct clk *clk, unsigned long rate)
294{
295 return _clk_simple_round_rate(clk, rate, 16);
296}
297
298static int perclk1_set_rate(struct clk *clk, unsigned long rate)
299{
300 unsigned int div;
301 unsigned int reg;
302 unsigned long parent_rate;
303
304 parent_rate = clk_get_rate(clk->parent);
305
306 div = parent_rate / rate;
307
308 if (div > 16 || div < 1 || ((parent_rate / div) != rate))
309 return -EINVAL;
310
311 div--;
312
313 reg = __raw_readl(CCM_PCDR);
314 reg &= ~CCM_PCDR_PCLK1_MASK;
315 reg |= div << CCM_PCDR_PCLK1_OFFSET;
316 __raw_writel(reg, CCM_PCDR);
317
318 return 0;
319}
320
321/*
322 * get peripheral clock 2 ( LCD, SD, SPI[12] )
323 */
324static unsigned long perclk2_get_rate(struct clk *clk)
325{
326 return clk_get_rate(clk->parent) / (((__raw_readl(CCM_PCDR) &
327 CCM_PCDR_PCLK2_MASK) >> CCM_PCDR_PCLK2_OFFSET) + 1);
328}
329
330static unsigned long perclk2_round_rate(struct clk *clk, unsigned long rate)
331{
332 return _clk_simple_round_rate(clk, rate, 16);
333}
334
335static int perclk2_set_rate(struct clk *clk, unsigned long rate)
336{
337 unsigned int div;
338 unsigned int reg;
339 unsigned long parent_rate;
340
341 parent_rate = clk_get_rate(clk->parent);
342
343 div = parent_rate / rate;
344
345 if (div > 16 || div < 1 || ((parent_rate / div) != rate))
346 return -EINVAL;
347
348 div--;
349
350 reg = __raw_readl(CCM_PCDR);
351 reg &= ~CCM_PCDR_PCLK2_MASK;
352 reg |= div << CCM_PCDR_PCLK2_OFFSET;
353 __raw_writel(reg, CCM_PCDR);
354
355 return 0;
356}
357
358/*
359 * get peripheral clock 3 ( SSI )
360 */
361static unsigned long perclk3_get_rate(struct clk *clk)
362{
363 return clk_get_rate(clk->parent) / (((__raw_readl(CCM_PCDR) &
364 CCM_PCDR_PCLK3_MASK) >> CCM_PCDR_PCLK3_OFFSET) + 1);
365}
366
367static unsigned long perclk3_round_rate(struct clk *clk, unsigned long rate)
368{
369 return _clk_simple_round_rate(clk, rate, 128);
370}
371
372static int perclk3_set_rate(struct clk *clk, unsigned long rate)
373{
374 unsigned int div;
375 unsigned int reg;
376 unsigned long parent_rate;
377
378 parent_rate = clk_get_rate(clk->parent);
379
380 div = parent_rate / rate;
381
382 if (div > 128 || div < 1 || ((parent_rate / div) != rate))
383 return -EINVAL;
384
385 div--;
386
387 reg = __raw_readl(CCM_PCDR);
388 reg &= ~CCM_PCDR_PCLK3_MASK;
389 reg |= div << CCM_PCDR_PCLK3_OFFSET;
390 __raw_writel(reg, CCM_PCDR);
391
392 return 0;
393}
394
395static struct clk perclk[] = {
396 {
397 .id = 0,
398 .parent = &system_clk,
399 .get_rate = perclk1_get_rate,
400 .round_rate = perclk1_round_rate,
401 .set_rate = perclk1_set_rate,
402 }, {
403 .id = 1,
404 .parent = &system_clk,
405 .get_rate = perclk2_get_rate,
406 .round_rate = perclk2_round_rate,
407 .set_rate = perclk2_set_rate,
408 }, {
409 .id = 2,
410 .parent = &system_clk,
411 .get_rate = perclk3_get_rate,
412 .round_rate = perclk3_round_rate,
413 .set_rate = perclk3_set_rate,
414 }
415};
416
417static const struct clk *clko_clocks[] = {
418 &perclk[0],
419 &hclk,
420 &clk48m,
421 &clk16m,
422 &prem_clk,
423 &fclk,
424};
425
426static int clko_set_parent(struct clk *clk, struct clk *parent)
427{
428 int i;
429 unsigned int reg;
430
431 i = _clk_can_use_parent(clko_clocks, ARRAY_SIZE(clko_clocks), parent);
432 if (i < 0)
433 return i;
434
435 reg = __raw_readl(CCM_CSCR) & ~CCM_CSCR_CLKO_MASK;
436 reg |= i << CCM_CSCR_CLKO_OFFSET;
437 __raw_writel(reg, CCM_CSCR);
438
439 if (clko_clocks[i]->set_rate && clko_clocks[i]->round_rate) {
440 clk->set_rate = _clk_parent_set_rate;
441 clk->round_rate = _clk_parent_round_rate;
442 } else {
443 clk->set_rate = NULL;
444 clk->round_rate = NULL;
445 }
446
447 return 0;
448}
449
450static struct clk clko_clk = {
451 .set_parent = clko_set_parent,
452};
453
454static struct clk dma_clk = {
455 .parent = &hclk,
456 .round_rate = _clk_parent_round_rate,
457 .set_rate = _clk_parent_set_rate,
458 .enable = _clk_enable,
459 .enable_reg = SCM_GCCR,
460 .enable_shift = SCM_GCCR_DMA_CLK_EN_OFFSET,
461 .disable = _clk_disable,
462};
463
464static struct clk csi_clk = {
465 .parent = &hclk,
466 .round_rate = _clk_parent_round_rate,
467 .set_rate = _clk_parent_set_rate,
468 .enable = _clk_enable,
469 .enable_reg = SCM_GCCR,
470 .enable_shift = SCM_GCCR_CSI_CLK_EN_OFFSET,
471 .disable = _clk_disable,
472};
473
474static struct clk mma_clk = {
475 .parent = &hclk,
476 .round_rate = _clk_parent_round_rate,
477 .set_rate = _clk_parent_set_rate,
478 .enable = _clk_enable,
479 .enable_reg = SCM_GCCR,
480 .enable_shift = SCM_GCCR_MMA_CLK_EN_OFFSET,
481 .disable = _clk_disable,
482};
483
484static struct clk usbd_clk = {
485 .parent = &clk48m,
486 .round_rate = _clk_parent_round_rate,
487 .set_rate = _clk_parent_set_rate,
488 .enable = _clk_enable,
489 .enable_reg = SCM_GCCR,
490 .enable_shift = SCM_GCCR_USBD_CLK_EN_OFFSET,
491 .disable = _clk_disable,
492};
493
494static struct clk gpt_clk = {
495 .parent = &perclk[0],
496 .round_rate = _clk_parent_round_rate,
497 .set_rate = _clk_parent_set_rate,
498};
499
500static struct clk uart_clk = {
501 .parent = &perclk[0],
502 .round_rate = _clk_parent_round_rate,
503 .set_rate = _clk_parent_set_rate,
504};
505
506static struct clk i2c_clk = {
507 .parent = &hclk,
508 .round_rate = _clk_parent_round_rate,
509 .set_rate = _clk_parent_set_rate,
510};
511
512static struct clk spi_clk = {
513 .parent = &perclk[1],
514 .round_rate = _clk_parent_round_rate,
515 .set_rate = _clk_parent_set_rate,
516};
517
518static struct clk sdhc_clk = {
519 .parent = &perclk[1],
520 .round_rate = _clk_parent_round_rate,
521 .set_rate = _clk_parent_set_rate,
522};
523
524static struct clk lcdc_clk = {
525 .parent = &perclk[1],
526 .round_rate = _clk_parent_round_rate,
527 .set_rate = _clk_parent_set_rate,
528};
529
530static struct clk mshc_clk = {
531 .parent = &hclk,
532 .round_rate = _clk_parent_round_rate,
533 .set_rate = _clk_parent_set_rate,
534};
535
536static struct clk ssi_clk = {
537 .parent = &perclk[2],
538 .round_rate = _clk_parent_round_rate,
539 .set_rate = _clk_parent_set_rate,
540};
541
542static struct clk rtc_clk = {
543 .parent = &clk32,
544};
545
546#define _REGISTER_CLOCK(d, n, c) \
547 { \
548 .dev_id = d, \
549 .con_id = n, \
550 .clk = &c, \
551 },
552static struct clk_lookup lookups[] __initdata = {
553 _REGISTER_CLOCK(NULL, "dma", dma_clk)
554 _REGISTER_CLOCK("mx1-camera.0", NULL, csi_clk)
555 _REGISTER_CLOCK(NULL, "mma", mma_clk)
556 _REGISTER_CLOCK("imx_udc.0", NULL, usbd_clk)
557 _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
558 _REGISTER_CLOCK("imx-uart.0", NULL, uart_clk)
559 _REGISTER_CLOCK("imx-uart.1", NULL, uart_clk)
560 _REGISTER_CLOCK("imx-uart.2", NULL, uart_clk)
561 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
562 _REGISTER_CLOCK("spi_imx.0", NULL, spi_clk)
563 _REGISTER_CLOCK("imx-mmc.0", NULL, sdhc_clk)
564 _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
565 _REGISTER_CLOCK(NULL, "mshc", mshc_clk)
566 _REGISTER_CLOCK(NULL, "ssi", ssi_clk)
567 _REGISTER_CLOCK("mxc_rtc.0", NULL, rtc_clk)
568};
569
570int __init mx1_clocks_init(unsigned long fref)
571{
572 unsigned int reg;
573
574 /* disable clocks we are able to */
575 __raw_writel(0, SCM_GCCR);
576
577 clk32_rate = fref;
578 reg = __raw_readl(CCM_CSCR);
579
580 /* detect clock reference for system PLL */
581 if (reg & CCM_CSCR_SYSTEM_SEL) {
582 prem_clk.parent = &clk16m;
583 } else {
584 /* ensure that oscillator is disabled */
585 reg &= ~(1 << CCM_CSCR_OSC_EN_SHIFT);
586 __raw_writel(reg, CCM_CSCR);
587 prem_clk.parent = &clk32_premult;
588 }
589
590 /* detect reference for CLKO */
591 reg = (reg & CCM_CSCR_CLKO_MASK) >> CCM_CSCR_CLKO_OFFSET;
592 clko_clk.parent = (struct clk *)clko_clocks[reg];
593
594 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
595
596 clk_enable(&hclk);
597 clk_enable(&fclk);
598
599 mxc_timer_init(&gpt_clk, IO_ADDRESS(TIM1_BASE_ADDR), TIM1_INT);
600
601 return 0;
602}
diff --git a/arch/arm/mach-mx1/crm_regs.h b/arch/arm/mach-mx1/crm_regs.h
deleted file mode 100644
index 22e866ff0c09..000000000000
--- a/arch/arm/mach-mx1/crm_regs.h
+++ /dev/null
@@ -1,55 +0,0 @@
1/*
2 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
4 *
5 * This file may be distributed under the terms of the GNU General
6 * Public License, version 2.
7 */
8
9#ifndef __ARCH_ARM_MACH_MX1_CRM_REGS_H__
10#define __ARCH_ARM_MACH_MX1_CRM_REGS_H__
11
12#define CCM_BASE IO_ADDRESS(CCM_BASE_ADDR)
13#define SCM_BASE IO_ADDRESS(SCM_BASE_ADDR)
14
15/* CCM register addresses */
16#define CCM_CSCR (CCM_BASE + 0x0)
17#define CCM_MPCTL0 (CCM_BASE + 0x4)
18#define CCM_MPCTL1 (CCM_BASE + 0x8)
19#define CCM_SPCTL0 (CCM_BASE + 0xC)
20#define CCM_SPCTL1 (CCM_BASE + 0x10)
21#define CCM_PCDR (CCM_BASE + 0x20)
22
23#define CCM_CSCR_CLKO_OFFSET 29
24#define CCM_CSCR_CLKO_MASK (0x7 << 29)
25#define CCM_CSCR_USB_OFFSET 26
26#define CCM_CSCR_USB_MASK (0x7 << 26)
27#define CCM_CSCR_SPLL_RESTART (1 << 22)
28#define CCM_CSCR_MPLL_RESTART (1 << 21)
29#define CCM_CSCR_OSC_EN_SHIFT 17
30#define CCM_CSCR_SYSTEM_SEL (1 << 16)
31#define CCM_CSCR_BCLK_OFFSET 10
32#define CCM_CSCR_BCLK_MASK (0xF << 10)
33#define CCM_CSCR_PRESC (1 << 15)
34#define CCM_CSCR_SPEN (1 << 1)
35#define CCM_CSCR_MPEN (1 << 0)
36
37#define CCM_PCDR_PCLK3_OFFSET 16
38#define CCM_PCDR_PCLK3_MASK (0x7F << 16)
39#define CCM_PCDR_PCLK2_OFFSET 4
40#define CCM_PCDR_PCLK2_MASK (0xF << 4)
41#define CCM_PCDR_PCLK1_OFFSET 0
42#define CCM_PCDR_PCLK1_MASK 0xF
43
44/* SCM register addresses */
45#define SCM_SIDR (SCM_BASE + 0x0)
46#define SCM_FMCR (SCM_BASE + 0x4)
47#define SCM_GPCR (SCM_BASE + 0x8)
48#define SCM_GCCR (SCM_BASE + 0xC)
49
50#define SCM_GCCR_DMA_CLK_EN_OFFSET 3
51#define SCM_GCCR_CSI_CLK_EN_OFFSET 2
52#define SCM_GCCR_MMA_CLK_EN_OFFSET 1
53#define SCM_GCCR_USBD_CLK_EN_OFFSET 0
54
55#endif /* __ARCH_ARM_MACH_MX2_CRM_REGS_H__ */
diff --git a/arch/arm/mach-mx1/devices.c b/arch/arm/mach-mx1/devices.c
deleted file mode 100644
index b6be29d1cb08..000000000000
--- a/arch/arm/mach-mx1/devices.c
+++ /dev/null
@@ -1,242 +0,0 @@
1/*
2 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
4 * Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
5 * Copyright (c) 2008 Darius Augulis <darius.augulis@teltonika.lt>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
19 * Boston, MA 02110-1301, USA.
20 */
21
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/platform_device.h>
25#include <linux/gpio.h>
26#include <mach/irqs.h>
27#include <mach/hardware.h>
28
29#include "devices.h"
30
31static struct resource imx_csi_resources[] = {
32 {
33 .start = 0x00224000,
34 .end = 0x00224010,
35 .flags = IORESOURCE_MEM,
36 }, {
37 .start = CSI_INT,
38 .end = CSI_INT,
39 .flags = IORESOURCE_IRQ,
40 },
41};
42
43static u64 imx_csi_dmamask = 0xffffffffUL;
44
45struct platform_device imx_csi_device = {
46 .name = "mx1-camera",
47 .id = 0, /* This is used to put cameras on this interface */
48 .dev = {
49 .dma_mask = &imx_csi_dmamask,
50 .coherent_dma_mask = 0xffffffff,
51 },
52 .resource = imx_csi_resources,
53 .num_resources = ARRAY_SIZE(imx_csi_resources),
54};
55
56static struct resource imx_i2c_resources[] = {
57 {
58 .start = 0x00217000,
59 .end = 0x00217010,
60 .flags = IORESOURCE_MEM,
61 }, {
62 .start = I2C_INT,
63 .end = I2C_INT,
64 .flags = IORESOURCE_IRQ,
65 },
66};
67
68struct platform_device imx_i2c_device = {
69 .name = "imx-i2c",
70 .id = 0,
71 .resource = imx_i2c_resources,
72 .num_resources = ARRAY_SIZE(imx_i2c_resources),
73};
74
75static struct resource imx_uart1_resources[] = {
76 {
77 .start = UART1_BASE_ADDR,
78 .end = UART1_BASE_ADDR + 0xD0,
79 .flags = IORESOURCE_MEM,
80 }, {
81 .start = UART1_MINT_RX,
82 .end = UART1_MINT_RX,
83 .flags = IORESOURCE_IRQ,
84 }, {
85 .start = UART1_MINT_TX,
86 .end = UART1_MINT_TX,
87 .flags = IORESOURCE_IRQ,
88 }, {
89 .start = UART1_MINT_RTS,
90 .end = UART1_MINT_RTS,
91 .flags = IORESOURCE_IRQ,
92 },
93};
94
95struct platform_device imx_uart1_device = {
96 .name = "imx-uart",
97 .id = 0,
98 .num_resources = ARRAY_SIZE(imx_uart1_resources),
99 .resource = imx_uart1_resources,
100};
101
102static struct resource imx_uart2_resources[] = {
103 {
104 .start = UART2_BASE_ADDR,
105 .end = UART2_BASE_ADDR + 0xD0,
106 .flags = IORESOURCE_MEM,
107 }, {
108 .start = UART2_MINT_RX,
109 .end = UART2_MINT_RX,
110 .flags = IORESOURCE_IRQ,
111 }, {
112 .start = UART2_MINT_TX,
113 .end = UART2_MINT_TX,
114 .flags = IORESOURCE_IRQ,
115 }, {
116 .start = UART2_MINT_RTS,
117 .end = UART2_MINT_RTS,
118 .flags = IORESOURCE_IRQ,
119 },
120};
121
122struct platform_device imx_uart2_device = {
123 .name = "imx-uart",
124 .id = 1,
125 .num_resources = ARRAY_SIZE(imx_uart2_resources),
126 .resource = imx_uart2_resources,
127};
128
129static struct resource imx_rtc_resources[] = {
130 {
131 .start = 0x00204000,
132 .end = 0x00204024,
133 .flags = IORESOURCE_MEM,
134 }, {
135 .start = RTC_INT,
136 .end = RTC_INT,
137 .flags = IORESOURCE_IRQ,
138 }, {
139 .start = RTC_SAMINT,
140 .end = RTC_SAMINT,
141 .flags = IORESOURCE_IRQ,
142 },
143};
144
145struct platform_device imx_rtc_device = {
146 .name = "rtc-imx",
147 .id = 0,
148 .resource = imx_rtc_resources,
149 .num_resources = ARRAY_SIZE(imx_rtc_resources),
150};
151
152static struct resource imx_wdt_resources[] = {
153 {
154 .start = 0x00201000,
155 .end = 0x00201008,
156 .flags = IORESOURCE_MEM,
157 }, {
158 .start = WDT_INT,
159 .end = WDT_INT,
160 .flags = IORESOURCE_IRQ,
161 },
162};
163
164struct platform_device imx_wdt_device = {
165 .name = "imx-wdt",
166 .id = 0,
167 .resource = imx_wdt_resources,
168 .num_resources = ARRAY_SIZE(imx_wdt_resources),
169};
170
171static struct resource imx_usb_resources[] = {
172 {
173 .start = 0x00212000,
174 .end = 0x00212148,
175 .flags = IORESOURCE_MEM,
176 }, {
177 .start = USBD_INT0,
178 .end = USBD_INT0,
179 .flags = IORESOURCE_IRQ,
180 }, {
181 .start = USBD_INT1,
182 .end = USBD_INT1,
183 .flags = IORESOURCE_IRQ,
184 }, {
185 .start = USBD_INT2,
186 .end = USBD_INT2,
187 .flags = IORESOURCE_IRQ,
188 }, {
189 .start = USBD_INT3,
190 .end = USBD_INT3,
191 .flags = IORESOURCE_IRQ,
192 }, {
193 .start = USBD_INT4,
194 .end = USBD_INT4,
195 .flags = IORESOURCE_IRQ,
196 }, {
197 .start = USBD_INT5,
198 .end = USBD_INT5,
199 .flags = IORESOURCE_IRQ,
200 }, {
201 .start = USBD_INT6,
202 .end = USBD_INT6,
203 .flags = IORESOURCE_IRQ,
204 },
205};
206
207struct platform_device imx_usb_device = {
208 .name = "imx_udc",
209 .id = 0,
210 .num_resources = ARRAY_SIZE(imx_usb_resources),
211 .resource = imx_usb_resources,
212};
213
214/* GPIO port description */
215static struct mxc_gpio_port imx_gpio_ports[] = {
216 {
217 .chip.label = "gpio-0",
218 .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR),
219 .irq = GPIO_INT_PORTA,
220 .virtual_irq_start = MXC_GPIO_IRQ_START,
221 }, {
222 .chip.label = "gpio-1",
223 .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x100),
224 .irq = GPIO_INT_PORTB,
225 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
226 }, {
227 .chip.label = "gpio-2",
228 .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x200),
229 .irq = GPIO_INT_PORTC,
230 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
231 }, {
232 .chip.label = "gpio-3",
233 .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x300),
234 .irq = GPIO_INT_PORTD,
235 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
236 }
237};
238
239int __init mxc_register_gpios(void)
240{
241 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
242}
diff --git a/arch/arm/mach-mx1/devices.h b/arch/arm/mach-mx1/devices.h
deleted file mode 100644
index 0da5d7cce3a2..000000000000
--- a/arch/arm/mach-mx1/devices.h
+++ /dev/null
@@ -1,7 +0,0 @@
1extern struct platform_device imx_csi_device;
2extern struct platform_device imx_i2c_device;
3extern struct platform_device imx_uart1_device;
4extern struct platform_device imx_uart2_device;
5extern struct platform_device imx_rtc_device;
6extern struct platform_device imx_wdt_device;
7extern struct platform_device imx_usb_device;
diff --git a/arch/arm/mach-mx1/generic.c b/arch/arm/mach-mx1/generic.c
deleted file mode 100644
index 7f9fc1034c08..000000000000
--- a/arch/arm/mach-mx1/generic.c
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * author: Sascha Hauer
3 * Created: april 20th, 2004
4 * Copyright: Synertronixx GmbH
5 *
6 * Common code for i.MX machines
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/io.h>
26
27#include <asm/mach/map.h>
28
29#include <mach/common.h>
30#include <mach/hardware.h>
31
32static struct map_desc imx_io_desc[] __initdata = {
33 {
34 .virtual = IMX_IO_BASE,
35 .pfn = __phys_to_pfn(IMX_IO_PHYS),
36 .length = IMX_IO_SIZE,
37 .type = MT_DEVICE
38 }
39};
40
41void __init mx1_map_io(void)
42{
43 mxc_set_cpu_type(MXC_CPU_MX1);
44 mxc_arch_reset_init(IO_ADDRESS(WDT_BASE_ADDR));
45
46 iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc));
47}
48
49void __init mx1_init_irq(void)
50{
51 mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR));
52}
53
diff --git a/arch/arm/mach-mx1/ksym_mx1.c b/arch/arm/mach-mx1/ksym_mx1.c
deleted file mode 100644
index b09ee12a4ff0..000000000000
--- a/arch/arm/mach-mx1/ksym_mx1.c
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * Exported ksyms of ARCH_MX1
3 *
4 * Copyright (C) 2008, Darius Augulis <augulis.darius@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/module.h>
13
14#include <mach/mx1_camera.h>
15
16/* IMX camera FIQ handler */
17EXPORT_SYMBOL(mx1_camera_sof_fiq_start);
18EXPORT_SYMBOL(mx1_camera_sof_fiq_end);
diff --git a/arch/arm/mach-mx1/mach-mx1ads.c b/arch/arm/mach-mx1/mach-mx1ads.c
deleted file mode 100644
index 51f3cfd83db2..000000000000
--- a/arch/arm/mach-mx1/mach-mx1ads.c
+++ /dev/null
@@ -1,165 +0,0 @@
1/*
2 * arch/arm/mach-imx/mach-mx1ads.c
3 *
4 * Initially based on:
5 * linux-2.6.7-imx/arch/arm/mach-imx/scb9328.c
6 * Copyright (c) 2004 Sascha Hauer <sascha@saschahauer.de>
7 *
8 * 2004 (c) MontaVista Software, Inc.
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
13 */
14
15#include <linux/i2c.h>
16#include <linux/i2c/pcf857x.h>
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/platform_device.h>
20#include <linux/mtd/physmap.h>
21
22#include <asm/mach-types.h>
23#include <asm/mach/arch.h>
24#include <asm/mach/time.h>
25
26#include <mach/common.h>
27#include <mach/hardware.h>
28#include <mach/i2c.h>
29#include <mach/imx-uart.h>
30#include <mach/iomux-mx1.h>
31#include <mach/irqs.h>
32
33#include "devices.h"
34
35static int mx1ads_pins[] = {
36 /* UART1 */
37 PC9_PF_UART1_CTS,
38 PC10_PF_UART1_RTS,
39 PC11_PF_UART1_TXD,
40 PC12_PF_UART1_RXD,
41 /* UART2 */
42 PB28_PF_UART2_CTS,
43 PB29_PF_UART2_RTS,
44 PB30_PF_UART2_TXD,
45 PB31_PF_UART2_RXD,
46 /* I2C */
47 PA15_PF_I2C_SDA,
48 PA16_PF_I2C_SCL,
49 /* SPI */
50 PC13_PF_SPI1_SPI_RDY,
51 PC14_PF_SPI1_SCLK,
52 PC15_PF_SPI1_SS,
53 PC16_PF_SPI1_MISO,
54 PC17_PF_SPI1_MOSI,
55};
56
57/*
58 * UARTs platform data
59 */
60
61static struct imxuart_platform_data uart_pdata[] = {
62 {
63 .flags = IMXUART_HAVE_RTSCTS,
64 }, {
65 .flags = IMXUART_HAVE_RTSCTS,
66 },
67};
68
69/*
70 * Physmap flash
71 */
72
73static struct physmap_flash_data mx1ads_flash_data = {
74 .width = 4, /* bankwidth in bytes */
75};
76
77static struct resource flash_resource = {
78 .start = IMX_CS0_PHYS,
79 .end = IMX_CS0_PHYS + SZ_32M - 1,
80 .flags = IORESOURCE_MEM,
81};
82
83static struct platform_device flash_device = {
84 .name = "physmap-flash",
85 .id = 0,
86 .resource = &flash_resource,
87 .num_resources = 1,
88};
89
90/*
91 * I2C
92 */
93static struct pcf857x_platform_data pcf857x_data[] = {
94 {
95 .gpio_base = 4 * 32,
96 }, {
97 .gpio_base = 4 * 32 + 16,
98 }
99};
100
101static struct imxi2c_platform_data mx1ads_i2c_data = {
102 .bitrate = 100000,
103};
104
105static struct i2c_board_info mx1ads_i2c_devices[] = {
106 {
107 I2C_BOARD_INFO("pcf8575", 0x22),
108 .platform_data = &pcf857x_data[0],
109 }, {
110 I2C_BOARD_INFO("pcf8575", 0x24),
111 .platform_data = &pcf857x_data[1],
112 },
113};
114
115/*
116 * Board init
117 */
118static void __init mx1ads_init(void)
119{
120 mxc_gpio_setup_multiple_pins(mx1ads_pins,
121 ARRAY_SIZE(mx1ads_pins), "mx1ads");
122
123 /* UART */
124 mxc_register_device(&imx_uart1_device, &uart_pdata[0]);
125 mxc_register_device(&imx_uart2_device, &uart_pdata[1]);
126
127 /* Physmap flash */
128 mxc_register_device(&flash_device, &mx1ads_flash_data);
129
130 /* I2C */
131 i2c_register_board_info(0, mx1ads_i2c_devices,
132 ARRAY_SIZE(mx1ads_i2c_devices));
133
134 mxc_register_device(&imx_i2c_device, &mx1ads_i2c_data);
135}
136
137static void __init mx1ads_timer_init(void)
138{
139 mx1_clocks_init(32000);
140}
141
142struct sys_timer mx1ads_timer = {
143 .init = mx1ads_timer_init,
144};
145
146MACHINE_START(MX1ADS, "Freescale MX1ADS")
147 /* Maintainer: Sascha Hauer, Pengutronix */
148 .phys_io = IMX_IO_PHYS,
149 .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc,
150 .boot_params = MX1_PHYS_OFFSET + 0x100,
151 .map_io = mx1_map_io,
152 .init_irq = mx1_init_irq,
153 .timer = &mx1ads_timer,
154 .init_machine = mx1ads_init,
155MACHINE_END
156
157MACHINE_START(MXLADS, "Freescale MXLADS")
158 .phys_io = IMX_IO_PHYS,
159 .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc,
160 .boot_params = MX1_PHYS_OFFSET + 0x100,
161 .map_io = mx1_map_io,
162 .init_irq = mx1_init_irq,
163 .timer = &mx1ads_timer,
164 .init_machine = mx1ads_init,
165MACHINE_END
diff --git a/arch/arm/mach-mx1/mach-scb9328.c b/arch/arm/mach-mx1/mach-scb9328.c
deleted file mode 100644
index 7587a7a12460..000000000000
--- a/arch/arm/mach-mx1/mach-scb9328.c
+++ /dev/null
@@ -1,158 +0,0 @@
1/*
2 * linux/arch/arm/mach-mx1/mach-scb9328.c
3 *
4 * Copyright (c) 2004 Sascha Hauer <saschahauer@web.de>
5 * Copyright (c) 2006-2008 Juergen Beisert <jbeisert@netscape.net>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 */
12
13#include <linux/platform_device.h>
14#include <linux/mtd/physmap.h>
15#include <linux/interrupt.h>
16#include <linux/dm9000.h>
17
18#include <asm/mach-types.h>
19#include <asm/mach/arch.h>
20#include <asm/mach/time.h>
21
22#include <mach/common.h>
23#include <mach/hardware.h>
24#include <mach/irqs.h>
25#include <mach/imx-uart.h>
26#include <mach/iomux-mx1.h>
27
28#include "devices.h"
29
30/*
31 * This scb9328 has a 32MiB flash
32 */
33static struct resource flash_resource = {
34 .start = IMX_CS0_PHYS,
35 .end = IMX_CS0_PHYS + (32 * 1024 * 1024) - 1,
36 .flags = IORESOURCE_MEM,
37};
38
39static struct physmap_flash_data scb_flash_data = {
40 .width = 2,
41};
42
43static struct platform_device scb_flash_device = {
44 .name = "physmap-flash",
45 .id = 0,
46 .dev = {
47 .platform_data = &scb_flash_data,
48 },
49 .resource = &flash_resource,
50 .num_resources = 1,
51};
52
53/*
54 * scb9328 has a DM9000 network controller
55 * connected to CS5, with 16 bit data path
56 * and interrupt connected to GPIO 3
57 */
58
59/*
60 * internal datapath is fixed 16 bit
61 */
62static struct dm9000_plat_data dm9000_platdata = {
63 .flags = DM9000_PLATF_16BITONLY,
64};
65
66/*
67 * the DM9000 drivers wants two defined address spaces
68 * to gain access to address latch registers and the data path.
69 */
70static struct resource dm9000x_resources[] = {
71 {
72 .name = "address area",
73 .start = IMX_CS5_PHYS,
74 .end = IMX_CS5_PHYS + 1,
75 .flags = IORESOURCE_MEM, /* address access */
76 }, {
77 .name = "data area",
78 .start = IMX_CS5_PHYS + 4,
79 .end = IMX_CS5_PHYS + 5,
80 .flags = IORESOURCE_MEM, /* data access */
81 }, {
82 .start = IRQ_GPIOC(3),
83 .end = IRQ_GPIOC(3),
84 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
85 },
86};
87
88static struct platform_device dm9000x_device = {
89 .name = "dm9000",
90 .id = 0,
91 .num_resources = ARRAY_SIZE(dm9000x_resources),
92 .resource = dm9000x_resources,
93 .dev = {
94 .platform_data = &dm9000_platdata,
95 }
96};
97
98static int mxc_uart1_pins[] = {
99 PC9_PF_UART1_CTS,
100 PC10_PF_UART1_RTS,
101 PC11_PF_UART1_TXD,
102 PC12_PF_UART1_RXD,
103};
104
105static int uart1_mxc_init(struct platform_device *pdev)
106{
107 return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
108 ARRAY_SIZE(mxc_uart1_pins), "UART1");
109}
110
111static int uart1_mxc_exit(struct platform_device *pdev)
112{
113 mxc_gpio_release_multiple_pins(mxc_uart1_pins,
114 ARRAY_SIZE(mxc_uart1_pins));
115 return 0;
116}
117
118static struct imxuart_platform_data uart_pdata = {
119 .init = uart1_mxc_init,
120 .exit = uart1_mxc_exit,
121 .flags = IMXUART_HAVE_RTSCTS,
122};
123
124static struct platform_device *devices[] __initdata = {
125 &scb_flash_device,
126 &dm9000x_device,
127};
128
129/*
130 * scb9328_init - Init the CPU card itself
131 */
132static void __init scb9328_init(void)
133{
134 mxc_register_device(&imx_uart1_device, &uart_pdata);
135
136 printk(KERN_INFO"Scb9328: Adding devices\n");
137 platform_add_devices(devices, ARRAY_SIZE(devices));
138}
139
140static void __init scb9328_timer_init(void)
141{
142 mx1_clocks_init(32000);
143}
144
145static struct sys_timer scb9328_timer = {
146 .init = scb9328_timer_init,
147};
148
149MACHINE_START(SCB9328, "Synertronixx scb9328")
150 /* Sascha Hauer */
151 .phys_io = 0x00200000,
152 .io_pg_offst = ((0xe0200000) >> 18) & 0xfffc,
153 .boot_params = 0x08000100,
154 .map_io = mx1_map_io,
155 .init_irq = mx1_init_irq,
156 .timer = &scb9328_timer,
157 .init_machine = scb9328_init,
158MACHINE_END
diff --git a/arch/arm/mach-mx1/mx1_camera_fiq.S b/arch/arm/mach-mx1/mx1_camera_fiq.S
deleted file mode 100644
index 9c69aa65bf17..000000000000
--- a/arch/arm/mach-mx1/mx1_camera_fiq.S
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * Copyright (C) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
3 *
4 * Based on linux/arch/arm/lib/floppydma.S
5 * Copyright (C) 1995, 1996 Russell King
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/linkage.h>
12#include <asm/assembler.h>
13
14 .text
15 .global mx1_camera_sof_fiq_end
16 .global mx1_camera_sof_fiq_start
17mx1_camera_sof_fiq_start:
18 @ enable dma
19 ldr r12, [r9]
20 orr r12, r12, #0x00000001
21 str r12, [r9]
22 @ unmask DMA interrupt
23 ldr r12, [r8]
24 bic r12, r12, r13
25 str r12, [r8]
26 @ disable SOF interrupt
27 ldr r12, [r10]
28 bic r12, r12, #0x00010000
29 str r12, [r10]
30 @ clear SOF flag
31 mov r12, #0x00010000
32 str r12, [r11]
33 @ return from FIQ
34 subs pc, lr, #4
35mx1_camera_sof_fiq_end:
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-23 01:49:51 -0500