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authorGregory CLEMENT <gregory.clement@free-electrons.com>2012-10-12 11:59:48 -0400
committerGregory CLEMENT <gregory.clement@free-electrons.com>2012-11-21 11:07:49 -0500
commit722202e10b488c14e93c428743a0e476093949e3 (patch)
tree204a0b63402b8d21dcc95699a7ce95de666d3919 /arch/arm/mach-mvebu
parent87b54e786afda828984645a8364a228ae8ac71f4 (diff)
arm: plat-orion: Add coherency attribute when setup mbus target
Recent SoC such as Armada 370/XP came with the possibility to deal with the I/O coherency by hardware. In this case the transaction attribute of the window must be flagged as "Shared transaction". Once this flag is set, then the transactions will be forced to be sent through the coherency block, in other case transaction is driven directly to DRAM. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Yehuda Yitschak <yehuday@marvell.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Diffstat (limited to 'arch/arm/mach-mvebu')
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