ARM: Remove dependency of plat-orion GPIO code on mach directory includes.

This patch makes the various mach dirs that use the plat-orion GPIO
code pass in GPIO-related platform info (GPIO controller base address,
secondary base IRQ number, etc) explicitly, instead of having
plat-orion get those values by including a mach dir include file --
the latter mechanism is problematic if you want to support multiple
ARM platforms in the same kernel image.

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>

4 files changed, 7 insertions, 50 deletions

diff --git a/arch/arm/mach-mv78xx0/include/mach/gpio.h b/arch/arm/mach-mv78xx0/include/mach/gpio.h
index d9d1535ea100..77e1b843e768 100644
--- a/arch/arm/mach-mv78xx0/include/mach/gpio.h
+++ b/arch/arm/mach-mv78xx0/include/mach/gpio.h
@@ -6,35 +6,4 @@
  * warranty of any kind, whether express or implied.
  */
 
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H
-
-#include <mach/irqs.h>
 #include <plat/gpio.h>
-#include <asm-generic/gpio.h>           /* cansleep wrappers */
-
-extern int mv78xx0_core_index(void);
-
-#define GPIO_MAX                32
-#define GPIO_OUT(pin)           (DEV_BUS_VIRT_BASE + 0x0100)
-#define GPIO_IO_CONF(pin)       (DEV_BUS_VIRT_BASE + 0x0104)
-#define GPIO_BLINK_EN(pin)      (DEV_BUS_VIRT_BASE + 0x0108)
-#define GPIO_IN_POL(pin)        (DEV_BUS_VIRT_BASE + 0x010c)
-#define GPIO_DATA_IN(pin)       (DEV_BUS_VIRT_BASE + 0x0110)
-#define GPIO_EDGE_CAUSE(pin)    (DEV_BUS_VIRT_BASE + 0x0114)
-#define GPIO_MASK_OFF           (mv78xx0_core_index() ? 0x18 : 0)
-#define GPIO_EDGE_MASK(pin)     (DEV_BUS_VIRT_BASE + 0x0118 + GPIO_MASK_OFF)
-#define GPIO_LEVEL_MASK(pin)    (DEV_BUS_VIRT_BASE + 0x011c + GPIO_MASK_OFF)
-
-static inline int gpio_to_irq(int pin)
-{
-        return pin + IRQ_MV78XX0_GPIO_START;
-}
-
-static inline int irq_to_gpio(int irq)
-{
-        return irq - IRQ_MV78XX0_GPIO_START;
-}
-
-
-#endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index 3eff39921d4d..3674497162e3 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -71,6 +71,7 @@
 #define DEV_BUS_VIRT_BASE       (MV78XX0_REGS_VIRT_BASE | 0x10000)
 #define  SAMPLE_AT_RESET_LOW    (DEV_BUS_VIRT_BASE | 0x0030)
 #define  SAMPLE_AT_RESET_HIGH   (DEV_BUS_VIRT_BASE | 0x0034)
+#define  GPIO_VIRT_BASE         (DEV_BUS_VIRT_BASE | 0x0100)
 #define  I2C_0_PHYS_BASE        (DEV_BUS_PHYS_BASE | 0x1000)
 #define  I2C_1_PHYS_BASE        (DEV_BUS_PHYS_BASE | 0x1100)
 #define  UART0_PHYS_BASE        (DEV_BUS_PHYS_BASE | 0x2000)
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 22b4ff893b3c..08da497c39c2 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -26,28 +26,18 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 
 void __init mv78xx0_init_irq(void)
 {
-        int i;
-
-        /* Initialize gpiolib. */
-        orion_gpio_init();
-
         orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
         orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
         orion_irq_init(64, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF));
 
         /*
-         * Mask and clear GPIO IRQ interrupts.
+         * Initialize gpiolib for GPIOs 0-31.  (The GPIO interrupt mask
+         * registers for core #1 are at an offset of 0x18 from those of
+         * core #0.)
          */
-        writel(0, GPIO_LEVEL_MASK(0));
-        writel(0, GPIO_EDGE_MASK(0));
-        writel(0, GPIO_EDGE_CAUSE(0));
-
-        for (i = IRQ_MV78XX0_GPIO_START; i < NR_IRQS; i++) {
-                set_irq_chip(i, &orion_gpio_irq_chip);
-                set_irq_handler(i, handle_level_irq);
-                irq_desc[i].status |= IRQ_LEVEL;
-                set_irq_flags(i, IRQF_VALID);
-        }
+        orion_gpio_init(0, 32, GPIO_VIRT_BASE,
+                        mv78xx0_core_index() ? 0x18 : 0,
+                        IRQ_MV78XX0_GPIO_START);
         set_irq_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler);
         set_irq_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler);
         set_irq_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler);
diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c
index 84db2dfc475c..65b72c454cb0 100644
--- a/arch/arm/mach-mv78xx0/mpp.c
+++ b/arch/arm/mach-mv78xx0/mpp.c
@@ -44,9 +44,6 @@ void __init mv78xx0_mpp_conf(unsigned int *mpp_list)
         if (!variant_mask)
                 return;
 
-        /* Initialize gpiolib. */
-        orion_gpio_init();
-
         printk(KERN_DEBUG "initial MPP regs:");
         for (i = 0; i < MPP_NR_REGS; i++) {
                 mpp_ctrl[i] = readl(MPP_CTRL(i));