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authorLinus Torvalds <torvalds@linux-foundation.org>2008-10-11 13:09:45 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-10-11 13:09:45 -0400
commit7cc4e87f912bbefa440a51856b8d076e5d1f554a (patch)
tree1b8df8683f3de37d2e8211ffa8d151f60d59af62 /arch/arm/mach-mv78xx0
parent5ba2f67afb02c5302b2898949ed6fc3b3d37dcf1 (diff)
parent69fc7eed5f56bce15b239e5110de2575a6970df4 (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (236 commits) [ARM] 5300/1: fixup spitz reset during boot [ARM] 5295/1: make ZONE_DMA optional [ARM] 5239/1: Palm Zire 72 power management support [ARM] 5298/1: Drop desc_handle_irq() [ARM] 5297/1: [KS8695] Fix two compile-time warnings [ARM] 5296/1: [KS8695] Replace macro's with trailing underscores. [ARM] pxa: allow multi-machine PCMCIA builds [ARM] pxa: add preliminary CPUFREQ support for PXA3xx [ARM] pxa: add missing ACCR bit definitions to pxa3xx-regs.h [ARM] pxa: rename cpu-pxa.c to cpufreq-pxa2xx.c [ARM] pxa/zylonite: add support for USB OHCI [ARM] ohci-pxa27x: use ioremap() and offset for register access [ARM] ohci-pxa27x: introduce pxa27x_clear_otgph() [ARM] ohci-pxa27x: use platform_get_{irq,resource} for the resource [ARM] ohci-pxa27x: move OHCI controller specific registers into the driver [ARM] ohci-pxa27x: introduce flags to avoid direct access to OHCI registers [ARM] pxa: move I2S register and bit definitions into pxa2xx-i2s.c [ARM] pxa: simplify DMA register definitions [ARM] pxa: make additional DCSR bits valid for PXA3xx [ARM] pxa: move i2c register and bit definitions into i2c-pxa.c ... Fixed up conflicts in arch/arm/mach-versatile/core.c sound/soc/pxa/pxa2xx-ac97.c sound/soc/pxa/pxa2xx-i2s.c manually.
Diffstat (limited to 'arch/arm/mach-mv78xx0')
-rw-r--r--arch/arm/mach-mv78xx0/addr-map.c2
-rw-r--r--arch/arm/mach-mv78xx0/common.c7
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/entry-macro.S18
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/irqs.h7
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/mv78xx0.h2
-rw-r--r--arch/arm/mach-mv78xx0/irq.c1
6 files changed, 29 insertions, 8 deletions
diff --git a/arch/arm/mach-mv78xx0/addr-map.c b/arch/arm/mach-mv78xx0/addr-map.c
index 4004b672a2eb..311d5b0e9bc7 100644
--- a/arch/arm/mach-mv78xx0/addr-map.c
+++ b/arch/arm/mach-mv78xx0/addr-map.c
@@ -11,7 +11,7 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/mbus.h> 13#include <linux/mbus.h>
14#include <asm/io.h> 14#include <linux/io.h>
15#include "common.h" 15#include "common.h"
16 16
17/* 17/*
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 5842d3bb02b2..238a2f8c2d52 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -285,6 +285,11 @@ static struct resource mv78xx0_ge00_shared_resources[] = {
285 .start = GE00_PHYS_BASE + 0x2000, 285 .start = GE00_PHYS_BASE + 0x2000,
286 .end = GE00_PHYS_BASE + 0x3fff, 286 .end = GE00_PHYS_BASE + 0x3fff,
287 .flags = IORESOURCE_MEM, 287 .flags = IORESOURCE_MEM,
288 }, {
289 .name = "ge err irq",
290 .start = IRQ_MV78XX0_GE_ERR,
291 .end = IRQ_MV78XX0_GE_ERR,
292 .flags = IORESOURCE_IRQ,
288 }, 293 },
289}; 294};
290 295
@@ -294,7 +299,7 @@ static struct platform_device mv78xx0_ge00_shared = {
294 .dev = { 299 .dev = {
295 .platform_data = &mv78xx0_ge00_shared_data, 300 .platform_data = &mv78xx0_ge00_shared_data,
296 }, 301 },
297 .num_resources = 1, 302 .num_resources = ARRAY_SIZE(mv78xx0_ge00_shared_resources),
298 .resource = mv78xx0_ge00_shared_resources, 303 .resource = mv78xx0_ge00_shared_resources,
299}; 304};
300 305
diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
index ed4a46bcd3b0..fbfb2693ce6c 100644
--- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
+++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
@@ -26,14 +26,22 @@
26 ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] 26 ldr \tmp, [\base, #IRQ_MASK_LOW_OFF]
27 mov \irqnr, #31 27 mov \irqnr, #31
28 ands \irqstat, \irqstat, \tmp 28 ands \irqstat, \irqstat, \tmp
29 bne 1001f
29 30
30 @ if no low interrupts set, check high interrupts 31 @ if no low interrupts set, check high interrupts
31 ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] 32 ldr \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF]
32 ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF] 33 ldr \tmp, [\base, #IRQ_MASK_HIGH_OFF]
33 moveq \irqnr, #63 34 mov \irqnr, #63
34 andeqs \irqstat, \irqstat, \tmp 35 ands \irqstat, \irqstat, \tmp
36 bne 1001f
37
38 @ if no high interrupts set, check error interrupts
39 ldr \irqstat, [\base, #IRQ_CAUSE_ERR_OFF]
40 ldr \tmp, [\base, #IRQ_MASK_ERR_OFF]
41 mov \irqnr, #95
42 ands \irqstat, \irqstat, \tmp
35 43
36 @ find first active interrupt source 44 @ find first active interrupt source
37 clzne \irqstat, \irqstat 451001: clzne \irqstat, \irqstat
38 subne \irqnr, \irqnr, \irqstat 46 subne \irqnr, \irqnr, \irqstat
39 .endm 47 .endm
diff --git a/arch/arm/mach-mv78xx0/include/mach/irqs.h b/arch/arm/mach-mv78xx0/include/mach/irqs.h
index 995d7fb8d06f..bebc330281ec 100644
--- a/arch/arm/mach-mv78xx0/include/mach/irqs.h
+++ b/arch/arm/mach-mv78xx0/include/mach/irqs.h
@@ -80,9 +80,14 @@
80#define IRQ_MV78XX0_DB_OUT 61 80#define IRQ_MV78XX0_DB_OUT 61
81 81
82/* 82/*
83 * MV78xx0 Error Interrupt Controller
84 */
85#define IRQ_MV78XX0_GE_ERR 70
86
87/*
83 * MV78XX0 General Purpose Pins 88 * MV78XX0 General Purpose Pins
84 */ 89 */
85#define IRQ_MV78XX0_GPIO_START 64 90#define IRQ_MV78XX0_GPIO_START 96
86#define NR_GPIO_IRQS GPIO_MAX 91#define NR_GPIO_IRQS GPIO_MAX
87 92
88#define NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS) 93#define NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS)
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index ad664178d6e1..ee9c5593ee92 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -71,8 +71,10 @@
71#define BRIDGE_INT_TIMER1 0x0004 71#define BRIDGE_INT_TIMER1 0x0004
72#define BRIDGE_INT_TIMER1_CLR (~0x0004) 72#define BRIDGE_INT_TIMER1_CLR (~0x0004)
73#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) 73#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
74#define IRQ_CAUSE_ERR_OFF 0x0000
74#define IRQ_CAUSE_LOW_OFF 0x0004 75#define IRQ_CAUSE_LOW_OFF 0x0004
75#define IRQ_CAUSE_HIGH_OFF 0x0008 76#define IRQ_CAUSE_HIGH_OFF 0x0008
77#define IRQ_MASK_ERR_OFF 0x000c
76#define IRQ_MASK_LOW_OFF 0x0010 78#define IRQ_MASK_LOW_OFF 0x0010
77#define IRQ_MASK_HIGH_OFF 0x0014 79#define IRQ_MASK_HIGH_OFF 0x0014
78#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 80#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 28248d37b999..503e5d195ae5 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -19,4 +19,5 @@ void __init mv78xx0_init_irq(void)
19{ 19{
20 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF)); 20 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
21 orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)); 21 orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
22 orion_irq_init(64, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF));
22} 23}