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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-10-09 16:33:07 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-10-09 16:33:07 -0400
commit6defd90433729c2d795865165cb34d938d8ff07c (patch)
treeebb963c6db463296b8f926d79d7ddc8c1251ca24 /arch/arm/mach-mv78xx0/include
parentc97f68145e8067b3ac4b126a6faebf90f9ffc302 (diff)
parent99c6bb390cf599b9e0aa6e69beacc4e5d875bf77 (diff)
Merge branch 'for-rmk' of git://git.marvell.com/orion
Merge branch 'orion-devel' into devel
Diffstat (limited to 'arch/arm/mach-mv78xx0/include')
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/entry-macro.S18
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/irqs.h7
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/mv78xx0.h2
3 files changed, 21 insertions, 6 deletions
diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
index ed4a46bcd3b0..fbfb2693ce6c 100644
--- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
+++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
@@ -26,14 +26,22 @@
26 ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] 26 ldr \tmp, [\base, #IRQ_MASK_LOW_OFF]
27 mov \irqnr, #31 27 mov \irqnr, #31
28 ands \irqstat, \irqstat, \tmp 28 ands \irqstat, \irqstat, \tmp
29 bne 1001f
29 30
30 @ if no low interrupts set, check high interrupts 31 @ if no low interrupts set, check high interrupts
31 ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] 32 ldr \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF]
32 ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF] 33 ldr \tmp, [\base, #IRQ_MASK_HIGH_OFF]
33 moveq \irqnr, #63 34 mov \irqnr, #63
34 andeqs \irqstat, \irqstat, \tmp 35 ands \irqstat, \irqstat, \tmp
36 bne 1001f
37
38 @ if no high interrupts set, check error interrupts
39 ldr \irqstat, [\base, #IRQ_CAUSE_ERR_OFF]
40 ldr \tmp, [\base, #IRQ_MASK_ERR_OFF]
41 mov \irqnr, #95
42 ands \irqstat, \irqstat, \tmp
35 43
36 @ find first active interrupt source 44 @ find first active interrupt source
37 clzne \irqstat, \irqstat 451001: clzne \irqstat, \irqstat
38 subne \irqnr, \irqnr, \irqstat 46 subne \irqnr, \irqnr, \irqstat
39 .endm 47 .endm
diff --git a/arch/arm/mach-mv78xx0/include/mach/irqs.h b/arch/arm/mach-mv78xx0/include/mach/irqs.h
index 995d7fb8d06f..bebc330281ec 100644
--- a/arch/arm/mach-mv78xx0/include/mach/irqs.h
+++ b/arch/arm/mach-mv78xx0/include/mach/irqs.h
@@ -80,9 +80,14 @@
80#define IRQ_MV78XX0_DB_OUT 61 80#define IRQ_MV78XX0_DB_OUT 61
81 81
82/* 82/*
83 * MV78xx0 Error Interrupt Controller
84 */
85#define IRQ_MV78XX0_GE_ERR 70
86
87/*
83 * MV78XX0 General Purpose Pins 88 * MV78XX0 General Purpose Pins
84 */ 89 */
85#define IRQ_MV78XX0_GPIO_START 64 90#define IRQ_MV78XX0_GPIO_START 96
86#define NR_GPIO_IRQS GPIO_MAX 91#define NR_GPIO_IRQS GPIO_MAX
87 92
88#define NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS) 93#define NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS)
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index ad664178d6e1..ee9c5593ee92 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -71,8 +71,10 @@
71#define BRIDGE_INT_TIMER1 0x0004 71#define BRIDGE_INT_TIMER1 0x0004
72#define BRIDGE_INT_TIMER1_CLR (~0x0004) 72#define BRIDGE_INT_TIMER1_CLR (~0x0004)
73#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) 73#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
74#define IRQ_CAUSE_ERR_OFF 0x0000
74#define IRQ_CAUSE_LOW_OFF 0x0004 75#define IRQ_CAUSE_LOW_OFF 0x0004
75#define IRQ_CAUSE_HIGH_OFF 0x0008 76#define IRQ_CAUSE_HIGH_OFF 0x0008
77#define IRQ_MASK_ERR_OFF 0x000c
76#define IRQ_MASK_LOW_OFF 0x0010 78#define IRQ_MASK_LOW_OFF 0x0010
77#define IRQ_MASK_HIGH_OFF 0x0014 79#define IRQ_MASK_HIGH_OFF 0x0014
78#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 80#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)