diff options
author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2013-03-21 12:59:19 -0400 |
---|---|---|
committer | Jason Cooper <jason@lakedaemon.net> | 2013-04-15 10:06:39 -0400 |
commit | 95b80e0a9ab3c1c8b41af5f2863801708f8f7288 (patch) | |
tree | e64757a5964eb9b745e9357581476a80d01ab3ee /arch/arm/mach-mv78xx0/include | |
parent | 5d1190ea69cd158835518d4132b3d98774073092 (diff) |
arm: mach-mv78xx0: convert to use the mvebu-mbus driver
This commit convers the mach-mv78xx0 sub-architecture to use the
mvebu-mbus driver. We simply have to call mvebu_mbus_init() in the
->init_early() function, and modify the PCIe code so that it uses the
new functions provided by mvebu-mbus to create the needed PCIe
windows.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/mach-mv78xx0/include')
-rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/mv78xx0.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h index 46200a183cf2..723748d8ba7d 100644 --- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h +++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h | |||
@@ -60,13 +60,18 @@ | |||
60 | */ | 60 | */ |
61 | #define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) | 61 | #define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) |
62 | #define BRIDGE_PHYS_BASE (MV78XX0_CORE_REGS_PHYS_BASE) | 62 | #define BRIDGE_PHYS_BASE (MV78XX0_CORE_REGS_PHYS_BASE) |
63 | #define BRIDGE_WINS_CPU0_BASE (MV78XX0_CORE0_REGS_PHYS_BASE) | ||
64 | #define BRIDGE_WINS_CPU1_BASE (MV78XX0_CORE1_REGS_PHYS_BASE) | ||
65 | #define BRIDGE_WINS_SZ (0xA000) | ||
63 | 66 | ||
64 | /* | 67 | /* |
65 | * Register Map | 68 | * Register Map |
66 | */ | 69 | */ |
67 | #define DDR_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x00000) | 70 | #define DDR_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x00000) |
68 | #define DDR_WINDOW_CPU0_BASE (DDR_VIRT_BASE + 0x1500) | 71 | #define DDR_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x00000) |
69 | #define DDR_WINDOW_CPU1_BASE (DDR_VIRT_BASE + 0x1570) | 72 | #define DDR_WINDOW_CPU0_BASE (DDR_PHYS_BASE + 0x1500) |
73 | #define DDR_WINDOW_CPU1_BASE (DDR_PHYS_BASE + 0x1570) | ||
74 | #define DDR_WINDOW_CPU_SZ (0x20) | ||
70 | 75 | ||
71 | #define DEV_BUS_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x10000) | 76 | #define DEV_BUS_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x10000) |
72 | #define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x10000) | 77 | #define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x10000) |