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authorNicolas Pitre <nicolas.pitre@linaro.org>2013-12-05 14:26:16 -0500
committerOlof Johansson <olof@lixom.net>2013-12-11 19:24:34 -0500
commitf45913fde00f13f502730809d128e607da2a57c8 (patch)
tree93500b68df0096c857b7f407ed75451456d848bd /arch/arm/mach-msm
parentbc34eb53ab02bb99f8ffae5662f1fde6f97ad275 (diff)
ARM: clean up cache handling in platform code
We have a handy macro to replace open coded __cpuc_flush_dcache_area(() and outer_clean_range() sequences. Let's use it. No functional change. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-msm')
-rw-r--r--arch/arm/mach-msm/platsmp.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 3f06edcdd0ce..f10a1f58fde9 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -99,8 +99,7 @@ static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
99 * "cpu" is Linux's internal ID. 99 * "cpu" is Linux's internal ID.
100 */ 100 */
101 pen_release = cpu_logical_map(cpu); 101 pen_release = cpu_logical_map(cpu);
102 __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release)); 102 sync_cache_w(&pen_release);
103 outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
104 103
105 /* 104 /*
106 * Send the secondary CPU a soft interrupt, thereby causing 105 * Send the secondary CPU a soft interrupt, thereby causing