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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-04-03 08:01:30 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-05-23 11:53:17 -0400
commit0f7b332f9777819a39a3b325690379a7efef89d1 (patch)
treeabc9dc45eb604cc4af88a5ab8c4a6c0cbdaa0596 /arch/arm/mach-msm
parent43b3e1898206a1e385c9cb06f6040ea83a58b638 (diff)
ARM: consolidate SMP cross call implementation
Rather than having each platform class provide a mach/smp.h header for smp_cross_call(), arrange for them to register the function with the core ARM SMP code instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-msm')
-rw-r--r--arch/arm/mach-msm/include/mach/smp.h23
-rw-r--r--arch/arm/mach-msm/platsmp.c4
2 files changed, 3 insertions, 24 deletions
diff --git a/arch/arm/mach-msm/include/mach/smp.h b/arch/arm/mach-msm/include/mach/smp.h
deleted file mode 100644
index 3c01000ecc80..000000000000
--- a/arch/arm/mach-msm/include/mach/smp.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#ifndef __ASM_ARCH_MSM_SMP_H
14#define __ASM_ARCH_MSM_SMP_H
15
16#include <asm/hardware/gic.h>
17
18static inline void smp_cross_call(const struct cpumask *mask, int ipi)
19{
20 gic_raise_softirq(mask, ipi);
21}
22
23#endif
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 0f427bc94447..2034098cf015 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -119,7 +119,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
119 * the boot monitor to read the system wide flags register, 119 * the boot monitor to read the system wide flags register,
120 * and branch to the address found there. 120 * and branch to the address found there.
121 */ 121 */
122 smp_cross_call(cpumask_of(cpu), 1); 122 gic_raise_softirq(cpumask_of(cpu), 1);
123 123
124 timeout = jiffies + (1 * HZ); 124 timeout = jiffies + (1 * HZ);
125 while (time_before(jiffies, timeout)) { 125 while (time_before(jiffies, timeout)) {
@@ -151,6 +151,8 @@ void __init smp_init_cpus(void)
151 151
152 for (i = 0; i < NR_CPUS; i++) 152 for (i = 0; i < NR_CPUS; i++)
153 set_cpu_possible(i, true); 153 set_cpu_possible(i, true);
154
155 set_smp_cross_call(gic_raise_softirq);
154} 156}
155 157
156void __init platform_smp_prepare_cpus(unsigned int max_cpus) 158void __init platform_smp_prepare_cpus(unsigned int max_cpus)