[ARM] msm: core platform support for ARCH_MSM7X00A

- core header files for arch-msm
- Kconfig and Makefiles to enable ARCH_MSM7X00A builds
- MSM7X00A specific arch_idle
- peripheral iomap and irq number definitions

Signed-off-by: Brian Swetland <swetland@google.com>

4 files changed, 126 insertions, 0 deletions

diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
new file mode 100644
index 000000000000..feb9e469df9a
--- /dev/null
+++ b/arch/arm/mach-msm/Makefile
@@ -0,0 +1,2 @@
+obj-y += io.o idle.o 
+
diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot
new file mode 100644
index 000000000000..24dfbf8c07c4
--- /dev/null
+++ b/arch/arm/mach-msm/Makefile.boot
@@ -0,0 +1,3 @@
+  zreladdr-y            := 0x10008000
+params_phys-y           := 0x10000100
+initrd_phys-y           := 0x10800000
diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S
new file mode 100644
index 000000000000..2b1cb7f16943
--- /dev/null
+++ b/arch/arm/mach-msm/idle.S
@@ -0,0 +1,36 @@
+/* linux/include/asm-arm/arch-msm/idle.S
+ *
+ * Idle processing for MSM7K - work around bugs with SWFI.
+ *
+ * Copyright (c) 2007 QUALCOMM Incorporated.
+ * Copyright (C) 2007 Google, Inc. 
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */ 
+                
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+ENTRY(arch_idle)
+#ifdef CONFIG_MSM7X00A_IDLE
+        mrc     p15, 0, r1, c1, c0, 0    /* read current CR    */
+        bic     r0, r1, #(1 << 2)        /* clear dcache bit   */
+        bic     r0, r0, #(1 << 12)       /* clear icache bit   */
+        mcr     p15, 0, r0, c1, c0, 0    /* disable d/i cache  */
+
+        mov     r0, #0                   /* prepare wfi value  */
+        mcr     p15, 0, r0, c7, c10, 0   /* flush the cache    */
+        mcr     p15, 0, r0, c7, c10, 4   /* memory barrier     */
+        mcr     p15, 0, r0, c7, c0, 4    /* wait for interrupt */
+
+        mcr     p15, 0, r1, c1, c0, 0    /* restore d/i cache  */
+#endif
+        mov     pc, lr
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
new file mode 100644
index 000000000000..c39edb994a88
--- /dev/null
+++ b/arch/arm/mach-msm/io.c
@@ -0,0 +1,85 @@
+/* arch/arm/mach-msm/io.c
+ *
+ * MSM7K io support
+ *
+ * Copyright (C) 2007 Google, Inc.
+ * Author: Brian Swetland <swetland@google.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/page.h>
+#include <asm/arch/msm_iomap.h>
+#include <asm/mach/map.h>
+
+#include <asm/arch/board.h>
+
+#define MSM_DEVICE(name) { \
+                .virtual = MSM_##name##_BASE, \
+                .pfn = __phys_to_pfn(MSM_##name##_PHYS), \
+                .length = MSM_##name##_SIZE, \
+                .type = MT_DEVICE_NONSHARED, \
+         }
+
+static struct map_desc msm_io_desc[] __initdata = {
+        MSM_DEVICE(VIC),
+        MSM_DEVICE(CSR),
+        MSM_DEVICE(GPT),
+        MSM_DEVICE(DMOV),
+        MSM_DEVICE(UART1),
+        MSM_DEVICE(UART2),
+        MSM_DEVICE(UART3),
+        MSM_DEVICE(I2C),
+        MSM_DEVICE(GPIO1),
+        MSM_DEVICE(GPIO2),
+        MSM_DEVICE(HSUSB),
+        MSM_DEVICE(CLK_CTL),
+        MSM_DEVICE(PMDH),
+        MSM_DEVICE(EMDH),
+        MSM_DEVICE(MDP),
+        {
+                .virtual =  MSM_SHARED_RAM_BASE,
+                .pfn =      __phys_to_pfn(MSM_SHARED_RAM_PHYS),
+                .length =   MSM_SHARED_RAM_SIZE,
+                .type =     MT_DEVICE,
+        },
+};
+
+void __init msm_map_common_io(void)
+{
+        /* Make sure the peripheral register window is closed, since
+         * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
+         * pages are peripheral interface or not.
+         */
+        asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
+
+        iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc));
+}
+
+void __iomem *
+__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
+{
+        if (mtype == MT_DEVICE) {
+                /* The peripherals in the 88000000 - D0000000 range
+                 * are only accessable by type MT_DEVICE_NONSHARED.
+                 * Adjust mtype as necessary to make this "just work."
+                 */
+                if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000))
+                        mtype = MT_DEVICE_NONSHARED;
+        }
+
+        return __arm_ioremap(phys_addr, size, mtype);
+}