diff options
author | Catalin Marinas <catalin.marinas@arm.com> | 2013-01-14 13:05:37 -0500 |
---|---|---|
committer | Catalin Marinas <catalin.marinas@arm.com> | 2013-03-26 12:12:02 -0400 |
commit | c0114709ed85a5693eb74acdfa03d94f7f12e5b8 (patch) | |
tree | 372c5cee96580d73e638d25a2b169a64b82bc908 /arch/arm/mach-msm | |
parent | aec0095653cd9812b9a15df0315364cc6d094c59 (diff) |
irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
All the calls to gic_secondary_init() pass 0 as the first argument.
Since this function is called on each CPU when starting, it can be done
in a platform-independent way via a CPU notifier registered by the GIC
code.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Tested-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Barry Song <baohua.song@csr.com>
Diffstat (limited to 'arch/arm/mach-msm')
-rw-r--r-- | arch/arm/mach-msm/platsmp.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index 42932865416a..00cdb0a5dac8 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c | |||
@@ -15,7 +15,6 @@ | |||
15 | #include <linux/jiffies.h> | 15 | #include <linux/jiffies.h> |
16 | #include <linux/smp.h> | 16 | #include <linux/smp.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | #include <linux/irqchip/arm-gic.h> | ||
19 | 18 | ||
20 | #include <asm/cacheflush.h> | 19 | #include <asm/cacheflush.h> |
21 | #include <asm/cputype.h> | 20 | #include <asm/cputype.h> |
@@ -42,13 +41,6 @@ static inline int get_core_count(void) | |||
42 | static void __cpuinit msm_secondary_init(unsigned int cpu) | 41 | static void __cpuinit msm_secondary_init(unsigned int cpu) |
43 | { | 42 | { |
44 | /* | 43 | /* |
45 | * if any interrupts are already enabled for the primary | ||
46 | * core (e.g. timer irq), then they will not have been enabled | ||
47 | * for us: do so | ||
48 | */ | ||
49 | gic_secondary_init(0); | ||
50 | |||
51 | /* | ||
52 | * let the primary processor know we're out of the | 44 | * let the primary processor know we're out of the |
53 | * pen, then head off into the C entry point | 45 | * pen, then head off into the C entry point |
54 | */ | 46 | */ |