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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-01 21:28:06 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-01 21:28:06 -0400
commit2a2bf85f05e42b12ea6bfe821e2d19221cf93555 (patch)
tree11abcdaef6e4f8307574056998d306d21558b6ed /arch/arm/mach-msm
parent11801e9de26992d37cb869cc74f389b6a7677e0e (diff)
parent99261fbad0a16f105b262d7525801697588ba526 (diff)
Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc device tree updates from Olof Johansson: "Device tree conversion and enablement branch. Mostly a bunch of new bindings and setup for various platforms, but the Via/Winchip VT8500 platform is also converted over from being 100% legacy to now use device tree for probing. More of that will come for 3.8." Trivial conflicts due to removal of vt8500 files, and one documentation file that was added with slightly different contents both here and in the USb tree. * tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (212 commits) arm: vt8500: Fixup for missing gpio.h ARM: LPC32xx: LED fix in PHY3250 DTS file ARM: dt: mmp-dma: add binding file arm: vt8500: Update arch-vt8500 to devicetree support. arm: vt8500: gpio: Devicetree support for arch-vt8500 arm: vt8500: doc: Add device tree bindings for arch-vt8500 devices arm: vt8500: clk: Add Common Clock Framework support video: vt8500: Add devicetree support for vt8500-fb and wm8505-fb serial: vt8500: Add devicetree support for vt8500-serial rtc: vt8500: Add devicetree support for vt8500-rtc arm: vt8500: Add device tree files for VIA/Wondermedia SoC's ARM: tegra: Add Avionic Design Tamonten Evaluation Carrier support ARM: tegra: Add Avionic Design Medcom-Wide support ARM: tegra: Add Avionic Design Plutux support ARM: tegra: Add Avionic Design Tamonten support ARM: tegra: dts: Add pwm label ARM: ux500: Fix SSP register address format ARM: ux500: Apply tc3589x's GPIO/IRQ properties to HREF's DT ARM: ux500: Remove redundant #gpio-cell properties from Snowball DT ARM: ux500: Add all encompassing sound node to the HREF Device Tree ...
Diffstat (limited to 'arch/arm/mach-msm')
-rw-r--r--arch/arm/mach-msm/Kconfig41
-rw-r--r--arch/arm/mach-msm/Makefile4
-rw-r--r--arch/arm/mach-msm/Makefile.boot3
-rw-r--r--arch/arm/mach-msm/board-dt-8660.c63
-rw-r--r--arch/arm/mach-msm/board-dt-8960.c49
-rw-r--r--arch/arm/mach-msm/board-halibut.c5
-rw-r--r--arch/arm/mach-msm/board-msm7x30.c9
-rw-r--r--arch/arm/mach-msm/board-msm8960.c122
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c161
-rw-r--r--arch/arm/mach-msm/board-qsd8x50.c7
-rw-r--r--arch/arm/mach-msm/board-trout.c5
-rw-r--r--arch/arm/mach-msm/common.h30
-rw-r--r--arch/arm/mach-msm/devices-msm8960.c85
-rw-r--r--arch/arm/mach-msm/include/mach/board.h3
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-7x00.h7
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-7x30.h4
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8960.h4
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8x50.h4
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8x60.h4
-rw-r--r--arch/arm/mach-msm/io.c2
-rw-r--r--arch/arm/mach-msm/platsmp.c8
-rw-r--r--arch/arm/mach-msm/timer.c186
22 files changed, 310 insertions, 496 deletions
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 1cd40ad301d3..b2740c800e8c 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -38,8 +38,6 @@ config ARCH_QSD8X50
38 38
39config ARCH_MSM8X60 39config ARCH_MSM8X60
40 bool "MSM8X60" 40 bool "MSM8X60"
41 select MACH_MSM8X60_SURF if (!MACH_MSM8X60_RUMI3 && !MACH_MSM8X60_SIM \
42 && !MACH_MSM8X60_FFA)
43 select ARCH_MSM_SCORPIONMP 41 select ARCH_MSM_SCORPIONMP
44 select ARM_GIC 42 select ARM_GIC
45 select CPU_V7 43 select CPU_V7
@@ -47,16 +45,17 @@ config ARCH_MSM8X60
47 select GPIO_MSM_V2 45 select GPIO_MSM_V2
48 select MSM_GPIOMUX 46 select MSM_GPIOMUX
49 select MSM_SCM if SMP 47 select MSM_SCM if SMP
48 select USE_OF
50 49
51config ARCH_MSM8960 50config ARCH_MSM8960
52 bool "MSM8960" 51 bool "MSM8960"
53 select ARCH_MSM_SCORPIONMP 52 select ARCH_MSM_SCORPIONMP
54 select MACH_MSM8960_SIM if (!MACH_MSM8960_RUMI3)
55 select ARM_GIC 53 select ARM_GIC
56 select CPU_V7 54 select CPU_V7
57 select MSM_V2_TLMM 55 select MSM_V2_TLMM
58 select MSM_GPIOMUX 56 select MSM_GPIOMUX
59 select MSM_SCM if SMP 57 select MSM_SCM if SMP
58 select USE_OF
60 59
61endchoice 60endchoice
62 61
@@ -112,42 +111,6 @@ config MACH_QSD8X50A_ST1_5
112 help 111 help
113 Support for the Qualcomm ST1.5. 112 Support for the Qualcomm ST1.5.
114 113
115config MACH_MSM8X60_RUMI3
116 depends on ARCH_MSM8X60
117 bool "MSM8x60 RUMI3"
118 help
119 Support for the Qualcomm MSM8x60 RUMI3 emulator.
120
121config MACH_MSM8X60_SURF
122 depends on ARCH_MSM8X60
123 bool "MSM8x60 SURF"
124 help
125 Support for the Qualcomm MSM8x60 SURF eval board.
126
127config MACH_MSM8X60_SIM
128 depends on ARCH_MSM8X60
129 bool "MSM8x60 Simulator"
130 help
131 Support for the Qualcomm MSM8x60 simulator.
132
133config MACH_MSM8X60_FFA
134 depends on ARCH_MSM8X60
135 bool "MSM8x60 FFA"
136 help
137 Support for the Qualcomm MSM8x60 FFA eval board.
138
139config MACH_MSM8960_SIM
140 depends on ARCH_MSM8960
141 bool "MSM8960 Simulator"
142 help
143 Support for the Qualcomm MSM8960 simulator.
144
145config MACH_MSM8960_RUMI3
146 depends on ARCH_MSM8960
147 bool "MSM8960 RUMI3"
148 help
149 Support for the Qualcomm MSM8960 RUMI3 emulator.
150
151endmenu 114endmenu
152 115
153config MSM_SMD_PKG3 116config MSM_SMD_PKG3
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 6a6c197212eb..17519faf082f 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -25,8 +25,8 @@ obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o b
25obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o devices-msm7x00.o 25obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o devices-msm7x00.o
26obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o 26obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o
27obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o 27obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o
28obj-$(CONFIG_ARCH_MSM8X60) += board-msm8x60.o 28obj-$(CONFIG_ARCH_MSM8X60) += board-dt-8660.o
29obj-$(CONFIG_ARCH_MSM8960) += board-msm8960.o devices-msm8960.o 29obj-$(CONFIG_ARCH_MSM8960) += board-dt-8960.o
30 30
31obj-$(CONFIG_ARCH_MSM7X30) += gpiomux-v1.o gpiomux.o 31obj-$(CONFIG_ARCH_MSM7X30) += gpiomux-v1.o gpiomux.o
32obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o gpiomux-v1.o gpiomux.o 32obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o gpiomux-v1.o gpiomux.o
diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot
index 9b803a578b4d..f7d6ae9c3487 100644
--- a/arch/arm/mach-msm/Makefile.boot
+++ b/arch/arm/mach-msm/Makefile.boot
@@ -1,3 +1,6 @@
1 zreladdr-y += 0x10008000 1 zreladdr-y += 0x10008000
2params_phys-y := 0x10000100 2params_phys-y := 0x10000100
3initrd_phys-y := 0x10800000 3initrd_phys-y := 0x10800000
4
5dtb-$(CONFIG_ARCH_MSM8X60) += msm8660-surf.dtb
6dtb-$(CONFIG_ARCH_MSM8960) += msm8960-cdp.dtb
diff --git a/arch/arm/mach-msm/board-dt-8660.c b/arch/arm/mach-msm/board-dt-8660.c
new file mode 100644
index 000000000000..f77f57f39104
--- /dev/null
+++ b/arch/arm/mach-msm/board-dt-8660.c
@@ -0,0 +1,63 @@
1/* Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/init.h>
14#include <linux/of.h>
15#include <linux/of_irq.h>
16#include <linux/of_platform.h>
17
18#include <asm/mach/arch.h>
19#include <asm/hardware/gic.h>
20
21#include <mach/board.h>
22#include "common.h"
23
24static const struct of_device_id msm_dt_gic_match[] __initconst = {
25 { .compatible = "qcom,msm-8660-qgic", .data = gic_of_init },
26 {}
27};
28
29static void __init msm8x60_init_irq(void)
30{
31 of_irq_init(msm_dt_gic_match);
32}
33
34static void __init msm8x60_init_late(void)
35{
36 smd_debugfs_init();
37}
38
39static struct of_dev_auxdata msm_auxdata_lookup[] __initdata = {
40 {}
41};
42
43static void __init msm8x60_dt_init(void)
44{
45 of_platform_populate(NULL, of_default_bus_match_table,
46 msm_auxdata_lookup, NULL);
47}
48
49static const char *msm8x60_fluid_match[] __initdata = {
50 "qcom,msm8660-fluid",
51 "qcom,msm8660-surf",
52 NULL
53};
54
55DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
56 .map_io = msm_map_msm8x60_io,
57 .init_irq = msm8x60_init_irq,
58 .handle_irq = gic_handle_irq,
59 .init_machine = msm8x60_dt_init,
60 .init_late = msm8x60_init_late,
61 .timer = &msm_dt_timer,
62 .dt_compat = msm8x60_fluid_match,
63MACHINE_END
diff --git a/arch/arm/mach-msm/board-dt-8960.c b/arch/arm/mach-msm/board-dt-8960.c
new file mode 100644
index 000000000000..8df99b8f3c92
--- /dev/null
+++ b/arch/arm/mach-msm/board-dt-8960.c
@@ -0,0 +1,49 @@
1/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/init.h>
14#include <linux/of_irq.h>
15#include <linux/of_platform.h>
16
17#include <asm/hardware/gic.h>
18#include <asm/mach/arch.h>
19
20#include "common.h"
21
22static const struct of_device_id msm_dt_gic_match[] __initconst = {
23 { .compatible = "qcom,msm-qgic2", .data = gic_of_init },
24 { }
25};
26
27static void __init msm_dt_init_irq(void)
28{
29 of_irq_init(msm_dt_gic_match);
30}
31
32static void __init msm_dt_init(void)
33{
34 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
35}
36
37static const char * const msm8960_dt_match[] __initconst = {
38 "qcom,msm8960-cdp",
39 NULL
40};
41
42DT_MACHINE_START(MSM8960_DT, "Qualcomm MSM (Flattened Device Tree)")
43 .map_io = msm_map_msm8960_io,
44 .init_irq = msm_dt_init_irq,
45 .timer = &msm_dt_timer,
46 .init_machine = msm_dt_init,
47 .dt_compat = msm8960_dt_match,
48 .handle_irq = gic_handle_irq,
49MACHINE_END
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index 4fa3e99d9a62..6ce542e2e21c 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -36,6 +36,7 @@
36#include <linux/mtd/partitions.h> 36#include <linux/mtd/partitions.h>
37 37
38#include "devices.h" 38#include "devices.h"
39#include "common.h"
39 40
40static struct resource smc91x_resources[] = { 41static struct resource smc91x_resources[] = {
41 [0] = { 42 [0] = {
@@ -66,8 +67,6 @@ static struct platform_device *devices[] __initdata = {
66 &smc91x_device, 67 &smc91x_device,
67}; 68};
68 69
69extern struct sys_timer msm_timer;
70
71static void __init halibut_init_early(void) 70static void __init halibut_init_early(void)
72{ 71{
73 arch_ioremap_caller = __msm_ioremap_caller; 72 arch_ioremap_caller = __msm_ioremap_caller;
@@ -107,5 +106,5 @@ MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)")
107 .init_irq = halibut_init_irq, 106 .init_irq = halibut_init_irq,
108 .init_machine = halibut_init, 107 .init_machine = halibut_init,
109 .init_late = halibut_init_late, 108 .init_late = halibut_init_late,
110 .timer = &msm_timer, 109 .timer = &msm7x01_timer,
111MACHINE_END 110MACHINE_END
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
index a5001378135d..effa6f4336c7 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -38,8 +38,7 @@
38#include "devices.h" 38#include "devices.h"
39#include "gpiomux.h" 39#include "gpiomux.h"
40#include "proc_comm.h" 40#include "proc_comm.h"
41 41#include "common.h"
42extern struct sys_timer msm_timer;
43 42
44static void __init msm7x30_fixup(struct tag *tag, char **cmdline, 43static void __init msm7x30_fixup(struct tag *tag, char **cmdline,
45 struct meminfo *mi) 44 struct meminfo *mi)
@@ -132,7 +131,7 @@ MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF")
132 .init_irq = msm7x30_init_irq, 131 .init_irq = msm7x30_init_irq,
133 .init_machine = msm7x30_init, 132 .init_machine = msm7x30_init,
134 .init_late = msm7x30_init_late, 133 .init_late = msm7x30_init_late,
135 .timer = &msm_timer, 134 .timer = &msm7x30_timer,
136MACHINE_END 135MACHINE_END
137 136
138MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA") 137MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA")
@@ -143,7 +142,7 @@ MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA")
143 .init_irq = msm7x30_init_irq, 142 .init_irq = msm7x30_init_irq,
144 .init_machine = msm7x30_init, 143 .init_machine = msm7x30_init,
145 .init_late = msm7x30_init_late, 144 .init_late = msm7x30_init_late,
146 .timer = &msm_timer, 145 .timer = &msm7x30_timer,
147MACHINE_END 146MACHINE_END
148 147
149MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID") 148MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID")
@@ -154,5 +153,5 @@ MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID")
154 .init_irq = msm7x30_init_irq, 153 .init_irq = msm7x30_init_irq,
155 .init_machine = msm7x30_init, 154 .init_machine = msm7x30_init,
156 .init_late = msm7x30_init_late, 155 .init_late = msm7x30_init_late,
157 .timer = &msm_timer, 156 .timer = &msm7x30_timer,
158MACHINE_END 157MACHINE_END
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
deleted file mode 100644
index 65f4a1daa2e5..000000000000
--- a/arch/arm/mach-msm/board-msm8960.c
+++ /dev/null
@@ -1,122 +0,0 @@
1/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15 * 02110-1301, USA.
16 *
17 */
18#include <linux/kernel.h>
19#include <linux/platform_device.h>
20#include <linux/io.h>
21#include <linux/irq.h>
22#include <linux/clkdev.h>
23#include <linux/memblock.h>
24
25#include <asm/mach-types.h>
26#include <asm/mach/arch.h>
27#include <asm/hardware/gic.h>
28#include <asm/setup.h>
29
30#include <mach/board.h>
31#include <mach/msm_iomap.h>
32
33#include "devices.h"
34
35static void __init msm8960_fixup(struct tag *tag, char **cmdline,
36 struct meminfo *mi)
37{
38 for (; tag->hdr.size; tag = tag_next(tag))
39 if (tag->hdr.tag == ATAG_MEM &&
40 tag->u.mem.start == 0x40200000) {
41 tag->u.mem.start = 0x40000000;
42 tag->u.mem.size += SZ_2M;
43 }
44}
45
46static void __init msm8960_reserve(void)
47{
48 memblock_remove(0x40000000, SZ_2M);
49}
50
51static void __init msm8960_map_io(void)
52{
53 msm_map_msm8960_io();
54}
55
56static void __init msm8960_init_irq(void)
57{
58 unsigned int i;
59 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
60 (void *)MSM_QGIC_CPU_BASE);
61
62 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
63 writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
64
65 if (machine_is_msm8960_rumi3())
66 writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
67
68 /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
69 * as they are configured as level, which does not play nice with
70 * handle_percpu_irq.
71 */
72 for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
73 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
74 irq_set_handler(i, handle_percpu_irq);
75 }
76}
77
78static struct platform_device *sim_devices[] __initdata = {
79 &msm8960_device_uart_gsbi2,
80};
81
82static struct platform_device *rumi3_devices[] __initdata = {
83 &msm8960_device_uart_gsbi5,
84};
85
86static void __init msm8960_sim_init(void)
87{
88 platform_add_devices(sim_devices, ARRAY_SIZE(sim_devices));
89}
90
91static void __init msm8960_rumi3_init(void)
92{
93 platform_add_devices(rumi3_devices, ARRAY_SIZE(rumi3_devices));
94}
95
96static void __init msm8960_init_late(void)
97{
98 smd_debugfs_init();
99}
100
101MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
102 .fixup = msm8960_fixup,
103 .reserve = msm8960_reserve,
104 .map_io = msm8960_map_io,
105 .init_irq = msm8960_init_irq,
106 .timer = &msm_timer,
107 .handle_irq = gic_handle_irq,
108 .init_machine = msm8960_sim_init,
109 .init_late = msm8960_init_late,
110MACHINE_END
111
112MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
113 .fixup = msm8960_fixup,
114 .reserve = msm8960_reserve,
115 .map_io = msm8960_map_io,
116 .init_irq = msm8960_init_irq,
117 .timer = &msm_timer,
118 .handle_irq = gic_handle_irq,
119 .init_machine = msm8960_rumi3_init,
120 .init_late = msm8960_init_late,
121MACHINE_END
122
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
deleted file mode 100644
index 06003b4ccb10..000000000000
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ /dev/null
@@ -1,161 +0,0 @@
1/* Copyright (c) 2010, 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/irq.h>
17#include <linux/irqdomain.h>
18#include <linux/of.h>
19#include <linux/of_address.h>
20#include <linux/of_irq.h>
21#include <linux/of_platform.h>
22#include <linux/memblock.h>
23
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26#include <asm/hardware/gic.h>
27#include <asm/setup.h>
28
29#include <mach/board.h>
30#include <mach/msm_iomap.h>
31
32static void __init msm8x60_fixup(struct tag *tag, char **cmdline,
33 struct meminfo *mi)
34{
35 for (; tag->hdr.size; tag = tag_next(tag))
36 if (tag->hdr.tag == ATAG_MEM &&
37 tag->u.mem.start == 0x40200000) {
38 tag->u.mem.start = 0x40000000;
39 tag->u.mem.size += SZ_2M;
40 }
41}
42
43static void __init msm8x60_reserve(void)
44{
45 memblock_remove(0x40000000, SZ_2M);
46}
47
48static void __init msm8x60_map_io(void)
49{
50 msm_map_msm8x60_io();
51}
52
53#ifdef CONFIG_OF
54static struct of_device_id msm_dt_gic_match[] __initdata = {
55 { .compatible = "qcom,msm-8660-qgic", .data = gic_of_init },
56 {}
57};
58#endif
59
60static void __init msm8x60_init_irq(void)
61{
62 if (!of_have_populated_dt())
63 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
64 (void *)MSM_QGIC_CPU_BASE);
65#ifdef CONFIG_OF
66 else
67 of_irq_init(msm_dt_gic_match);
68#endif
69
70 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
71 writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
72
73 /* RUMI does not adhere to GIC spec by enabling STIs by default.
74 * Enable/clear is supposed to be RO for STIs, but is RW on RUMI.
75 */
76 if (!machine_is_msm8x60_sim())
77 writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
78}
79
80static void __init msm8x60_init(void)
81{
82}
83
84static void __init msm8x60_init_late(void)
85{
86 smd_debugfs_init();
87}
88
89#ifdef CONFIG_OF
90static struct of_dev_auxdata msm_auxdata_lookup[] __initdata = {
91 {}
92};
93
94static void __init msm8x60_dt_init(void)
95{
96 of_platform_populate(NULL, of_default_bus_match_table,
97 msm_auxdata_lookup, NULL);
98}
99
100static const char *msm8x60_fluid_match[] __initdata = {
101 "qcom,msm8660-fluid",
102 "qcom,msm8660-surf",
103 NULL
104};
105#endif /* CONFIG_OF */
106
107MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
108 .fixup = msm8x60_fixup,
109 .reserve = msm8x60_reserve,
110 .map_io = msm8x60_map_io,
111 .init_irq = msm8x60_init_irq,
112 .handle_irq = gic_handle_irq,
113 .init_machine = msm8x60_init,
114 .init_late = msm8x60_init_late,
115 .timer = &msm_timer,
116MACHINE_END
117
118MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
119 .fixup = msm8x60_fixup,
120 .reserve = msm8x60_reserve,
121 .map_io = msm8x60_map_io,
122 .init_irq = msm8x60_init_irq,
123 .handle_irq = gic_handle_irq,
124 .init_machine = msm8x60_init,
125 .init_late = msm8x60_init_late,
126 .timer = &msm_timer,
127MACHINE_END
128
129MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
130 .fixup = msm8x60_fixup,
131 .reserve = msm8x60_reserve,
132 .map_io = msm8x60_map_io,
133 .init_irq = msm8x60_init_irq,
134 .handle_irq = gic_handle_irq,
135 .init_machine = msm8x60_init,
136 .init_late = msm8x60_init_late,
137 .timer = &msm_timer,
138MACHINE_END
139
140MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
141 .fixup = msm8x60_fixup,
142 .reserve = msm8x60_reserve,
143 .map_io = msm8x60_map_io,
144 .init_irq = msm8x60_init_irq,
145 .handle_irq = gic_handle_irq,
146 .init_machine = msm8x60_init,
147 .init_late = msm8x60_init_late,
148 .timer = &msm_timer,
149MACHINE_END
150
151#ifdef CONFIG_OF
152/* TODO: General device tree support for all MSM. */
153DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
154 .map_io = msm8x60_map_io,
155 .init_irq = msm8x60_init_irq,
156 .init_machine = msm8x60_dt_init,
157 .init_late = msm8x60_init_late,
158 .timer = &msm_timer,
159 .dt_compat = msm8x60_fluid_match,
160MACHINE_END
161#endif /* CONFIG_OF */
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
index c8fe0edb9761..b16b71abf5f6 100644
--- a/arch/arm/mach-msm/board-qsd8x50.c
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -35,8 +35,7 @@
35#include <mach/mmc.h> 35#include <mach/mmc.h>
36 36
37#include "devices.h" 37#include "devices.h"
38 38#include "common.h"
39extern struct sys_timer msm_timer;
40 39
41static const resource_size_t qsd8x50_surf_smc91x_base __initdata = 0x70000300; 40static const resource_size_t qsd8x50_surf_smc91x_base __initdata = 0x70000300;
42static const unsigned qsd8x50_surf_smc91x_gpio __initdata = 156; 41static const unsigned qsd8x50_surf_smc91x_gpio __initdata = 156;
@@ -201,7 +200,7 @@ MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
201 .init_irq = qsd8x50_init_irq, 200 .init_irq = qsd8x50_init_irq,
202 .init_machine = qsd8x50_init, 201 .init_machine = qsd8x50_init,
203 .init_late = qsd8x50_init_late, 202 .init_late = qsd8x50_init_late,
204 .timer = &msm_timer, 203 .timer = &qsd8x50_timer,
205MACHINE_END 204MACHINE_END
206 205
207MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5") 206MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
@@ -210,5 +209,5 @@ MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
210 .init_irq = qsd8x50_init_irq, 209 .init_irq = qsd8x50_init_irq,
211 .init_machine = qsd8x50_init, 210 .init_machine = qsd8x50_init,
212 .init_late = qsd8x50_init_late, 211 .init_late = qsd8x50_init_late,
213 .timer = &msm_timer, 212 .timer = &qsd8x50_timer,
214MACHINE_END 213MACHINE_END
diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c
index bbe13f12fa01..4ba0800e243e 100644
--- a/arch/arm/mach-msm/board-trout.c
+++ b/arch/arm/mach-msm/board-trout.c
@@ -31,6 +31,7 @@
31 31
32#include "devices.h" 32#include "devices.h"
33#include "board-trout.h" 33#include "board-trout.h"
34#include "common.h"
34 35
35extern int trout_init_mmc(unsigned int); 36extern int trout_init_mmc(unsigned int);
36 37
@@ -42,8 +43,6 @@ static struct platform_device *devices[] __initdata = {
42 &msm_device_i2c, 43 &msm_device_i2c,
43}; 44};
44 45
45extern struct sys_timer msm_timer;
46
47static void __init trout_init_early(void) 46static void __init trout_init_early(void)
48{ 47{
49 arch_ioremap_caller = __msm_ioremap_caller; 48 arch_ioremap_caller = __msm_ioremap_caller;
@@ -111,5 +110,5 @@ MACHINE_START(TROUT, "HTC Dream")
111 .init_irq = trout_init_irq, 110 .init_irq = trout_init_irq,
112 .init_machine = trout_init, 111 .init_machine = trout_init,
113 .init_late = trout_init_late, 112 .init_late = trout_init_late,
114 .timer = &msm_timer, 113 .timer = &msm7x01_timer,
115MACHINE_END 114MACHINE_END
diff --git a/arch/arm/mach-msm/common.h b/arch/arm/mach-msm/common.h
new file mode 100644
index 000000000000..d68e5d7854f5
--- /dev/null
+++ b/arch/arm/mach-msm/common.h
@@ -0,0 +1,30 @@
1/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#ifndef __MACH_COMMON_H
13#define __MACH_COMMON_H
14
15extern struct sys_timer msm7x01_timer;
16extern struct sys_timer msm7x30_timer;
17extern struct sys_timer msm_dt_timer;
18extern struct sys_timer qsd8x50_timer;
19
20extern void msm_map_common_io(void);
21extern void msm_map_msm7x30_io(void);
22extern void msm_map_msm8x60_io(void);
23extern void msm_map_msm8960_io(void);
24extern void msm_map_qsd8x50_io(void);
25
26extern void __iomem *__msm_ioremap_caller(unsigned long phys_addr, size_t size,
27 unsigned int mtype, void *caller);
28
29
30#endif
diff --git a/arch/arm/mach-msm/devices-msm8960.c b/arch/arm/mach-msm/devices-msm8960.c
deleted file mode 100644
index d9e1f26475de..000000000000
--- a/arch/arm/mach-msm/devices-msm8960.c
+++ /dev/null
@@ -1,85 +0,0 @@
1/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15 * 02110-1301, USA.
16 */
17
18#include <linux/kernel.h>
19#include <linux/platform_device.h>
20
21#include <linux/dma-mapping.h>
22#include <mach/irqs-8960.h>
23#include <mach/board.h>
24
25#include "devices.h"
26
27#define MSM_GSBI2_PHYS 0x16100000
28#define MSM_UART2DM_PHYS (MSM_GSBI2_PHYS + 0x40000)
29
30#define MSM_GSBI5_PHYS 0x16400000
31#define MSM_UART5DM_PHYS (MSM_GSBI5_PHYS + 0x40000)
32
33static struct resource resources_uart_gsbi2[] = {
34 {
35 .start = GSBI2_UARTDM_IRQ,
36 .end = GSBI2_UARTDM_IRQ,
37 .flags = IORESOURCE_IRQ,
38 },
39 {
40 .start = MSM_UART2DM_PHYS,
41 .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1,
42 .name = "uart_resource",
43 .flags = IORESOURCE_MEM,
44 },
45 {
46 .start = MSM_GSBI2_PHYS,
47 .end = MSM_GSBI2_PHYS + PAGE_SIZE - 1,
48 .name = "gsbi_resource",
49 .flags = IORESOURCE_MEM,
50 },
51};
52
53struct platform_device msm8960_device_uart_gsbi2 = {
54 .name = "msm_serial",
55 .id = 0,
56 .num_resources = ARRAY_SIZE(resources_uart_gsbi2),
57 .resource = resources_uart_gsbi2,
58};
59
60static struct resource resources_uart_gsbi5[] = {
61 {
62 .start = GSBI5_UARTDM_IRQ,
63 .end = GSBI5_UARTDM_IRQ,
64 .flags = IORESOURCE_IRQ,
65 },
66 {
67 .start = MSM_UART5DM_PHYS,
68 .end = MSM_UART5DM_PHYS + PAGE_SIZE - 1,
69 .name = "uart_resource",
70 .flags = IORESOURCE_MEM,
71 },
72 {
73 .start = MSM_GSBI5_PHYS,
74 .end = MSM_GSBI5_PHYS + PAGE_SIZE - 1,
75 .name = "gsbi_resource",
76 .flags = IORESOURCE_MEM,
77 },
78};
79
80struct platform_device msm8960_device_uart_gsbi5 = {
81 .name = "msm_serial",
82 .id = 0,
83 .num_resources = ARRAY_SIZE(resources_uart_gsbi5),
84 .resource = resources_uart_gsbi5,
85};
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index 5a0811a4c851..0a0c393d8e31 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -24,12 +24,9 @@
24 24
25struct clk_lookup; 25struct clk_lookup;
26 26
27extern struct sys_timer msm_timer;
28
29/* common init routines for use by arch/arm/mach-msm/board-*.c */ 27/* common init routines for use by arch/arm/mach-msm/board-*.c */
30 28
31void __init msm_add_devices(void); 29void __init msm_add_devices(void);
32void __init msm_map_common_io(void);
33void __init msm_init_irq(void); 30void __init msm_init_irq(void);
34void __init msm_init_gpio(void); 31void __init msm_init_gpio(void);
35void __init msm_clock_init(struct clk_lookup *clock_tbl, unsigned num_clocks); 32void __init msm_clock_init(struct clk_lookup *clock_tbl, unsigned num_clocks);
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
index 6c4046c21296..67dc0e98b958 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
@@ -105,11 +105,4 @@
105#define MSM_AD5_PHYS 0xAC000000 105#define MSM_AD5_PHYS 0xAC000000
106#define MSM_AD5_SIZE (SZ_1M*13) 106#define MSM_AD5_SIZE (SZ_1M*13)
107 107
108#ifndef __ASSEMBLY__
109
110extern void __iomem *__msm_ioremap_caller(unsigned long phys_addr, size_t size,
111 unsigned int mtype, void *caller);
112
113#endif
114
115#endif 108#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
index f944fe65a657..198202c267c8 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
@@ -100,8 +100,4 @@
100#define MSM_HSUSB_PHYS 0xA3600000 100#define MSM_HSUSB_PHYS 0xA3600000
101#define MSM_HSUSB_SIZE SZ_1K 101#define MSM_HSUSB_SIZE SZ_1K
102 102
103#ifndef __ASSEMBLY__
104extern void msm_map_msm7x30_io(void);
105#endif
106
107#endif 103#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
index facf434d09be..9819a556acae 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
@@ -50,8 +50,4 @@
50#define MSM_DEBUG_UART_PHYS 0x16440000 50#define MSM_DEBUG_UART_PHYS 0x16440000
51#endif 51#endif
52 52
53#ifndef __ASSEMBLY__
54extern void msm_map_msm8960_io(void);
55#endif
56
57#endif 53#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
index da77cc1d545d..0faa894729b7 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
@@ -122,8 +122,4 @@
122#define MSM_SDC4_PHYS 0xA0600000 122#define MSM_SDC4_PHYS 0xA0600000
123#define MSM_SDC4_SIZE SZ_4K 123#define MSM_SDC4_SIZE SZ_4K
124 124
125#ifndef __ASSEMBLY__
126extern void msm_map_qsd8x50_io(void);
127#endif
128
129#endif 125#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 21a2a8859a9a..c6d38f1d0c98 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -67,8 +67,4 @@
67#define MSM_DEBUG_UART_PHYS 0x19C40000 67#define MSM_DEBUG_UART_PHYS 0x19C40000
68#endif 68#endif
69 69
70#ifndef __ASSEMBLY__
71extern void msm_map_msm8x60_io(void);
72#endif
73
74#endif 70#endif
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 3cb4f4c35710..3854f6f20ce2 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -29,6 +29,8 @@
29 29
30#include <mach/board.h> 30#include <mach/board.h>
31 31
32#include "common.h"
33
32#define MSM_CHIP_DEVICE_TYPE(name, chip, mem_type) { \ 34#define MSM_CHIP_DEVICE_TYPE(name, chip, mem_type) { \
33 .virtual = (unsigned long) MSM_##name##_BASE, \ 35 .virtual = (unsigned long) MSM_##name##_BASE, \
34 .pfn = __phys_to_pfn(chip##_##name##_PHYS), \ 36 .pfn = __phys_to_pfn(chip##_##name##_PHYS), \
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index e012dc8391cf..2d791e6b4ad1 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -22,17 +22,12 @@
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
23#include <asm/smp_plat.h> 23#include <asm/smp_plat.h>
24 24
25#include <mach/msm_iomap.h>
26
27#include "scm-boot.h" 25#include "scm-boot.h"
28 26
29#define VDD_SC1_ARRAY_CLAMP_GFS_CTL 0x15A0 27#define VDD_SC1_ARRAY_CLAMP_GFS_CTL 0x15A0
30#define SCSS_CPU1CORE_RESET 0xD80 28#define SCSS_CPU1CORE_RESET 0xD80
31#define SCSS_DBG_STATUS_CORE_PWRDUP 0xE64 29#define SCSS_DBG_STATUS_CORE_PWRDUP 0xE64
32 30
33/* Mask for edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
34#define GIC_PPI_EDGE_MASK 0xFFFFD7FF
35
36extern void msm_secondary_startup(void); 31extern void msm_secondary_startup(void);
37/* 32/*
38 * control for which core is the next to come out of the secondary 33 * control for which core is the next to come out of the secondary
@@ -50,9 +45,6 @@ static inline int get_core_count(void)
50 45
51void __cpuinit platform_secondary_init(unsigned int cpu) 46void __cpuinit platform_secondary_init(unsigned int cpu)
52{ 47{
53 /* Configure edge-triggered PPIs */
54 writel(GIC_PPI_EDGE_MASK, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
55
56 /* 48 /*
57 * if any interrupts are already enabled for the primary 49 * if any interrupts are already enabled for the primary
58 * core (e.g. timer irq), then they will not have been enabled 50 * core (e.g. timer irq), then they will not have been enabled
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 004f93515a4e..476549a8a709 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * 2 *
3 * Copyright (C) 2007 Google, Inc. 3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved. 4 * Copyright (c) 2009-2012, The Linux Foundation. All rights reserved.
5 * 5 *
6 * This software is licensed under the terms of the GNU General Public 6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and 7 * License version 2, as published by the Free Software Foundation, and
@@ -20,15 +20,16 @@
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/of.h>
24#include <linux/of_address.h>
25#include <linux/of_irq.h>
23 26
24#include <asm/mach/time.h> 27#include <asm/mach/time.h>
25#include <asm/hardware/gic.h> 28#include <asm/hardware/gic.h>
26#include <asm/localtimer.h> 29#include <asm/localtimer.h>
27#include <asm/sched_clock.h> 30#include <asm/sched_clock.h>
28 31
29#include <mach/msm_iomap.h> 32#include "common.h"
30#include <mach/cpu.h>
31#include <mach/board.h>
32 33
33#define TIMER_MATCH_VAL 0x0000 34#define TIMER_MATCH_VAL 0x0000
34#define TIMER_COUNT_VAL 0x0004 35#define TIMER_COUNT_VAL 0x0004
@@ -36,7 +37,6 @@
36#define TIMER_ENABLE_CLR_ON_MATCH_EN BIT(1) 37#define TIMER_ENABLE_CLR_ON_MATCH_EN BIT(1)
37#define TIMER_ENABLE_EN BIT(0) 38#define TIMER_ENABLE_EN BIT(0)
38#define TIMER_CLEAR 0x000C 39#define TIMER_CLEAR 0x000C
39#define DGT_CLK_CTL 0x0034
40#define DGT_CLK_CTL_DIV_4 0x3 40#define DGT_CLK_CTL_DIV_4 0x3
41 41
42#define GPT_HZ 32768 42#define GPT_HZ 32768
@@ -151,7 +151,7 @@ static int __cpuinit msm_local_timer_setup(struct clock_event_device *evt)
151 151
152 *__this_cpu_ptr(msm_evt.percpu_evt) = evt; 152 *__this_cpu_ptr(msm_evt.percpu_evt) = evt;
153 clockevents_register_device(evt); 153 clockevents_register_device(evt);
154 enable_percpu_irq(evt->irq, 0); 154 enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING);
155 return 0; 155 return 0;
156} 156}
157 157
@@ -172,44 +172,21 @@ static notrace u32 msm_sched_clock_read(void)
172 return msm_clocksource.read(&msm_clocksource); 172 return msm_clocksource.read(&msm_clocksource);
173} 173}
174 174
175static void __init msm_timer_init(void) 175static void __init msm_timer_init(u32 dgt_hz, int sched_bits, int irq,
176 bool percpu)
176{ 177{
177 struct clock_event_device *ce = &msm_clockevent; 178 struct clock_event_device *ce = &msm_clockevent;
178 struct clocksource *cs = &msm_clocksource; 179 struct clocksource *cs = &msm_clocksource;
179 int res; 180 int res;
180 u32 dgt_hz;
181
182 if (cpu_is_msm7x01()) {
183 event_base = MSM_CSR_BASE;
184 source_base = MSM_CSR_BASE + 0x10;
185 dgt_hz = 19200000 >> MSM_DGT_SHIFT; /* 600 KHz */
186 cs->read = msm_read_timer_count_shift;
187 cs->mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT));
188 } else if (cpu_is_msm7x30()) {
189 event_base = MSM_CSR_BASE + 0x04;
190 source_base = MSM_CSR_BASE + 0x24;
191 dgt_hz = 24576000 / 4;
192 } else if (cpu_is_qsd8x50()) {
193 event_base = MSM_CSR_BASE;
194 source_base = MSM_CSR_BASE + 0x10;
195 dgt_hz = 19200000 / 4;
196 } else if (cpu_is_msm8x60() || cpu_is_msm8960()) {
197 event_base = MSM_TMR_BASE + 0x04;
198 /* Use CPU0's timer as the global clock source. */
199 source_base = MSM_TMR0_BASE + 0x24;
200 dgt_hz = 27000000 / 4;
201 writel_relaxed(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
202 } else
203 BUG();
204 181
205 writel_relaxed(0, event_base + TIMER_ENABLE); 182 writel_relaxed(0, event_base + TIMER_ENABLE);
206 writel_relaxed(0, event_base + TIMER_CLEAR); 183 writel_relaxed(0, event_base + TIMER_CLEAR);
207 writel_relaxed(~0, event_base + TIMER_MATCH_VAL); 184 writel_relaxed(~0, event_base + TIMER_MATCH_VAL);
208 ce->cpumask = cpumask_of(0); 185 ce->cpumask = cpumask_of(0);
186 ce->irq = irq;
209 187
210 ce->irq = INT_GP_TIMER_EXP;
211 clockevents_config_and_register(ce, GPT_HZ, 4, 0xffffffff); 188 clockevents_config_and_register(ce, GPT_HZ, 4, 0xffffffff);
212 if (cpu_is_msm8x60() || cpu_is_msm8960()) { 189 if (percpu) {
213 msm_evt.percpu_evt = alloc_percpu(struct clock_event_device *); 190 msm_evt.percpu_evt = alloc_percpu(struct clock_event_device *);
214 if (!msm_evt.percpu_evt) { 191 if (!msm_evt.percpu_evt) {
215 pr_err("memory allocation failed for %s\n", ce->name); 192 pr_err("memory allocation failed for %s\n", ce->name);
@@ -219,7 +196,7 @@ static void __init msm_timer_init(void)
219 res = request_percpu_irq(ce->irq, msm_timer_interrupt, 196 res = request_percpu_irq(ce->irq, msm_timer_interrupt,
220 ce->name, msm_evt.percpu_evt); 197 ce->name, msm_evt.percpu_evt);
221 if (!res) { 198 if (!res) {
222 enable_percpu_irq(ce->irq, 0); 199 enable_percpu_irq(ce->irq, IRQ_TYPE_EDGE_RISING);
223#ifdef CONFIG_LOCAL_TIMERS 200#ifdef CONFIG_LOCAL_TIMERS
224 local_timer_register(&msm_local_timer_ops); 201 local_timer_register(&msm_local_timer_ops);
225#endif 202#endif
@@ -238,10 +215,143 @@ err:
238 res = clocksource_register_hz(cs, dgt_hz); 215 res = clocksource_register_hz(cs, dgt_hz);
239 if (res) 216 if (res)
240 pr_err("clocksource_register failed\n"); 217 pr_err("clocksource_register failed\n");
241 setup_sched_clock(msm_sched_clock_read, 218 setup_sched_clock(msm_sched_clock_read, sched_bits, dgt_hz);
242 cpu_is_msm7x01() ? 32 - MSM_DGT_SHIFT : 32, dgt_hz);
243} 219}
244 220
245struct sys_timer msm_timer = { 221#ifdef CONFIG_OF
246 .init = msm_timer_init 222static const struct of_device_id msm_dgt_match[] __initconst = {
223 { .compatible = "qcom,msm-dgt" },
224 { },
225};
226
227static const struct of_device_id msm_gpt_match[] __initconst = {
228 { .compatible = "qcom,msm-gpt" },
229 { },
230};
231
232static void __init msm_dt_timer_init(void)
233{
234 struct device_node *np;
235 u32 freq;
236 int irq;
237 struct resource res;
238 u32 percpu_offset;
239 void __iomem *dgt_clk_ctl;
240
241 np = of_find_matching_node(NULL, msm_gpt_match);
242 if (!np) {
243 pr_err("Can't find GPT DT node\n");
244 return;
245 }
246
247 event_base = of_iomap(np, 0);
248 if (!event_base) {
249 pr_err("Failed to map event base\n");
250 return;
251 }
252
253 irq = irq_of_parse_and_map(np, 0);
254 if (irq <= 0) {
255 pr_err("Can't get irq\n");
256 return;
257 }
258 of_node_put(np);
259
260 np = of_find_matching_node(NULL, msm_dgt_match);
261 if (!np) {
262 pr_err("Can't find DGT DT node\n");
263 return;
264 }
265
266 if (of_property_read_u32(np, "cpu-offset", &percpu_offset))
267 percpu_offset = 0;
268
269 if (of_address_to_resource(np, 0, &res)) {
270 pr_err("Failed to parse DGT resource\n");
271 return;
272 }
273
274 source_base = ioremap(res.start + percpu_offset, resource_size(&res));
275 if (!source_base) {
276 pr_err("Failed to map source base\n");
277 return;
278 }
279
280 if (!of_address_to_resource(np, 1, &res)) {
281 dgt_clk_ctl = ioremap(res.start + percpu_offset,
282 resource_size(&res));
283 if (!dgt_clk_ctl) {
284 pr_err("Failed to map DGT control base\n");
285 return;
286 }
287 writel_relaxed(DGT_CLK_CTL_DIV_4, dgt_clk_ctl);
288 iounmap(dgt_clk_ctl);
289 }
290
291 if (of_property_read_u32(np, "clock-frequency", &freq)) {
292 pr_err("Unknown frequency\n");
293 return;
294 }
295 of_node_put(np);
296
297 msm_timer_init(freq, 32, irq, !!percpu_offset);
298}
299
300struct sys_timer msm_dt_timer = {
301 .init = msm_dt_timer_init
302};
303#endif
304
305static int __init msm_timer_map(phys_addr_t event, phys_addr_t source)
306{
307 event_base = ioremap(event, SZ_64);
308 if (!event_base) {
309 pr_err("Failed to map event base\n");
310 return 1;
311 }
312 source_base = ioremap(source, SZ_64);
313 if (!source_base) {
314 pr_err("Failed to map source base\n");
315 return 1;
316 }
317 return 0;
318}
319
320static void __init msm7x01_timer_init(void)
321{
322 struct clocksource *cs = &msm_clocksource;
323
324 if (msm_timer_map(0xc0100000, 0xc0100010))
325 return;
326 cs->read = msm_read_timer_count_shift;
327 cs->mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT));
328 /* 600 KHz */
329 msm_timer_init(19200000 >> MSM_DGT_SHIFT, 32 - MSM_DGT_SHIFT, 7,
330 false);
331}
332
333struct sys_timer msm7x01_timer = {
334 .init = msm7x01_timer_init
335};
336
337static void __init msm7x30_timer_init(void)
338{
339 if (msm_timer_map(0xc0100004, 0xc0100024))
340 return;
341 msm_timer_init(24576000 / 4, 32, 1, false);
342}
343
344struct sys_timer msm7x30_timer = {
345 .init = msm7x30_timer_init
346};
347
348static void __init qsd8x50_timer_init(void)
349{
350 if (msm_timer_map(0xAC100000, 0xAC100010))
351 return;
352 msm_timer_init(19200000 / 4, 32, 7, false);
353}
354
355struct sys_timer qsd8x50_timer = {
356 .init = qsd8x50_timer_init
247}; 357};