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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-08-05 11:14:15 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-08-07 04:55:48 -0400
commita09e64fbc0094e3073dbb09c3b4bfe4ab669244b (patch)
tree69689f467179891b498bd7423fcf61925173db31 /arch/arm/mach-msm
parenta1b81a84fff05dbfef45b7012c26e1fee9973e5d (diff)
[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-msm')
-rw-r--r--arch/arm/mach-msm/board-halibut.c6
-rw-r--r--arch/arm/mach-msm/common.c4
-rw-r--r--arch/arm/mach-msm/dma.c2
-rw-r--r--arch/arm/mach-msm/idle.S2
-rw-r--r--arch/arm/mach-msm/include/mach/board.h37
-rw-r--r--arch/arm/mach-msm/include/mach/debug-macro.S40
-rw-r--r--arch/arm/mach-msm/include/mach/dma.h151
-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro.S38
-rw-r--r--arch/arm/mach-msm/include/mach/hardware.h18
-rw-r--r--arch/arm/mach-msm/include/mach/io.h33
-rw-r--r--arch/arm/mach-msm/include/mach/irqs.h90
-rw-r--r--arch/arm/mach-msm/include/mach/memory.h27
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap.h104
-rw-r--r--arch/arm/mach-msm/include/mach/system.h23
-rw-r--r--arch/arm/mach-msm/include/mach/timex.h21
-rw-r--r--arch/arm/mach-msm/include/mach/uncompress.h36
-rw-r--r--arch/arm/mach-msm/include/mach/vmalloc.h22
-rw-r--r--arch/arm/mach-msm/io.c6
-rw-r--r--arch/arm/mach-msm/irq.c4
-rw-r--r--arch/arm/mach-msm/timer.c2
20 files changed, 653 insertions, 13 deletions
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index 46460218a208..995afc4ade4b 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -19,14 +19,14 @@
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/input.h> 20#include <linux/input.h>
21 21
22#include <asm/arch/hardware.h> 22#include <mach/hardware.h>
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26#include <asm/mach/flash.h> 26#include <asm/mach/flash.h>
27 27
28#include <asm/arch/board.h> 28#include <mach/board.h>
29#include <asm/arch/msm_iomap.h> 29#include <mach/msm_iomap.h>
30 30
31#include <asm/io.h> 31#include <asm/io.h>
32#include <asm/delay.h> 32#include <asm/delay.h>
diff --git a/arch/arm/mach-msm/common.c b/arch/arm/mach-msm/common.c
index 3f5d3362f887..3a511368a5d8 100644
--- a/arch/arm/mach-msm/common.c
+++ b/arch/arm/mach-msm/common.c
@@ -28,9 +28,9 @@
28#include <linux/mtd/nand.h> 28#include <linux/mtd/nand.h>
29#include <linux/mtd/partitions.h> 29#include <linux/mtd/partitions.h>
30 30
31#include <asm/arch/msm_iomap.h> 31#include <mach/msm_iomap.h>
32 32
33#include <asm/arch/board.h> 33#include <mach/board.h>
34 34
35struct flash_platform_data msm_nand_data = { 35struct flash_platform_data msm_nand_data = {
36 .parts = 0, 36 .parts = 0,
diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c
index 8b0f339b3274..9de08265d974 100644
--- a/arch/arm/mach-msm/dma.c
+++ b/arch/arm/mach-msm/dma.c
@@ -15,7 +15,7 @@
15 15
16#include <asm/io.h> 16#include <asm/io.h>
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <asm/arch/dma.h> 18#include <mach/dma.h>
19 19
20#define MSM_DMOV_CHANNEL_COUNT 16 20#define MSM_DMOV_CHANNEL_COUNT 16
21 21
diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S
index 2b1cb7f16943..6a94f0527137 100644
--- a/arch/arm/mach-msm/idle.S
+++ b/arch/arm/mach-msm/idle.S
@@ -1,4 +1,4 @@
1/* linux/include/asm-arm/arch-msm/idle.S 1/* arch/arm/mach-msm/include/mach/idle.S
2 * 2 *
3 * Idle processing for MSM7K - work around bugs with SWFI. 3 * Idle processing for MSM7K - work around bugs with SWFI.
4 * 4 *
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
new file mode 100644
index 000000000000..a7639493c095
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -0,0 +1,37 @@
1/* arch/arm/mach-msm/include/mach/board.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef __ASM_ARCH_MSM_BOARD_H
18#define __ASM_ARCH_MSM_BOARD_H
19
20#include <linux/types.h>
21
22/* platform device data structures */
23
24struct msm_mddi_platform_data
25{
26 void (*panel_power)(int on);
27 unsigned has_vsync_irq:1;
28};
29
30/* common init routines for use by arch/arm/mach-msm/board-*.c */
31
32void __init msm_add_devices(void);
33void __init msm_map_common_io(void);
34void __init msm_init_irq(void);
35void __init msm_init_gpio(void);
36
37#endif
diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S
new file mode 100644
index 000000000000..528eef4b605c
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/debug-macro.S
@@ -0,0 +1,40 @@
1/* arch/arm/mach-msm7200/include/mach/debug-macro.S
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <mach/hardware.h>
18#include <mach/msm_iomap.h>
19
20 .macro addruart,rx
21 @ see if the MMU is enabled and select appropriate base address
22 mrc p15, 0, \rx, c1, c0
23 tst \rx, #1
24 ldreq \rx, =MSM_UART1_PHYS
25 ldrne \rx, =MSM_UART1_BASE
26 .endm
27
28 .macro senduart,rd,rx
29 str \rd, [\rx, #0x0C]
30 .endm
31
32 .macro waituart,rd,rx
33 @ wait for TX_READY
341: ldr \rd, [\rx, #0x08]
35 tst \rd, #0x04
36 beq 1b
37 .endm
38
39 .macro busyuart,rd,rx
40 .endm
diff --git a/arch/arm/mach-msm/include/mach/dma.h b/arch/arm/mach-msm/include/mach/dma.h
new file mode 100644
index 000000000000..ad1c87f86d10
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/dma.h
@@ -0,0 +1,151 @@
1/* arch/arm/mach-msm/include/mach/dma.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MSM_DMA_H
17
18#include <linux/list.h>
19#include <mach/msm_iomap.h>
20
21struct msm_dmov_cmd {
22 struct list_head list;
23 unsigned int cmdptr;
24 void (*complete_func)(struct msm_dmov_cmd *cmd, unsigned int result);
25/* void (*user_result_func)(struct msm_dmov_cmd *cmd); */
26};
27
28void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd);
29void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd);
30int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr);
31/* int msm_dmov_exec_cmd_etc(unsigned id, unsigned int cmdptr, int timeout, int interruptible); */
32
33
34
35#define DMOV_SD0(off, ch) (MSM_DMOV_BASE + 0x0000 + (off) + ((ch) << 2))
36#define DMOV_SD1(off, ch) (MSM_DMOV_BASE + 0x0400 + (off) + ((ch) << 2))
37#define DMOV_SD2(off, ch) (MSM_DMOV_BASE + 0x0800 + (off) + ((ch) << 2))
38#define DMOV_SD3(off, ch) (MSM_DMOV_BASE + 0x0C00 + (off) + ((ch) << 2))
39
40/* only security domain 3 is available to the ARM11
41 * SD0 -> mARM trusted, SD1 -> mARM nontrusted, SD2 -> aDSP, SD3 -> aARM
42 */
43
44#define DMOV_CMD_PTR(ch) DMOV_SD3(0x000, ch)
45#define DMOV_CMD_LIST (0 << 29) /* does not work */
46#define DMOV_CMD_PTR_LIST (1 << 29) /* works */
47#define DMOV_CMD_INPUT_CFG (2 << 29) /* untested */
48#define DMOV_CMD_OUTPUT_CFG (3 << 29) /* untested */
49#define DMOV_CMD_ADDR(addr) ((addr) >> 3)
50
51#define DMOV_RSLT(ch) DMOV_SD3(0x040, ch)
52#define DMOV_RSLT_VALID (1 << 31) /* 0 == host has empties result fifo */
53#define DMOV_RSLT_ERROR (1 << 3)
54#define DMOV_RSLT_FLUSH (1 << 2)
55#define DMOV_RSLT_DONE (1 << 1) /* top pointer done */
56#define DMOV_RSLT_USER (1 << 0) /* command with FR force result */
57
58#define DMOV_FLUSH0(ch) DMOV_SD3(0x080, ch)
59#define DMOV_FLUSH1(ch) DMOV_SD3(0x0C0, ch)
60#define DMOV_FLUSH2(ch) DMOV_SD3(0x100, ch)
61#define DMOV_FLUSH3(ch) DMOV_SD3(0x140, ch)
62#define DMOV_FLUSH4(ch) DMOV_SD3(0x180, ch)
63#define DMOV_FLUSH5(ch) DMOV_SD3(0x1C0, ch)
64
65#define DMOV_STATUS(ch) DMOV_SD3(0x200, ch)
66#define DMOV_STATUS_RSLT_COUNT(n) (((n) >> 29))
67#define DMOV_STATUS_CMD_COUNT(n) (((n) >> 27) & 3)
68#define DMOV_STATUS_RSLT_VALID (1 << 1)
69#define DMOV_STATUS_CMD_PTR_RDY (1 << 0)
70
71#define DMOV_ISR DMOV_SD3(0x380, 0)
72
73#define DMOV_CONFIG(ch) DMOV_SD3(0x300, ch)
74#define DMOV_CONFIG_FORCE_TOP_PTR_RSLT (1 << 2)
75#define DMOV_CONFIG_FORCE_FLUSH_RSLT (1 << 1)
76#define DMOV_CONFIG_IRQ_EN (1 << 0)
77
78/* channel assignments */
79
80#define DMOV_NAND_CHAN 7
81#define DMOV_NAND_CRCI_CMD 5
82#define DMOV_NAND_CRCI_DATA 4
83
84#define DMOV_SDC1_CHAN 8
85#define DMOV_SDC1_CRCI 6
86
87#define DMOV_SDC2_CHAN 8
88#define DMOV_SDC2_CRCI 7
89
90#define DMOV_TSIF_CHAN 10
91#define DMOV_TSIF_CRCI 10
92
93#define DMOV_USB_CHAN 11
94
95/* no client rate control ifc (eg, ram) */
96#define DMOV_NONE_CRCI 0
97
98
99/* If the CMD_PTR register has CMD_PTR_LIST selected, the data mover
100 * is going to walk a list of 32bit pointers as described below. Each
101 * pointer points to a *array* of dmov_s, etc structs. The last pointer
102 * in the list is marked with CMD_PTR_LP. The last struct in each array
103 * is marked with CMD_LC (see below).
104 */
105#define CMD_PTR_ADDR(addr) ((addr) >> 3)
106#define CMD_PTR_LP (1 << 31) /* last pointer */
107#define CMD_PTR_PT (3 << 29) /* ? */
108
109/* Single Item Mode */
110typedef struct {
111 unsigned cmd;
112 unsigned src;
113 unsigned dst;
114 unsigned len;
115} dmov_s;
116
117/* Scatter/Gather Mode */
118typedef struct {
119 unsigned cmd;
120 unsigned src_dscr;
121 unsigned dst_dscr;
122 unsigned _reserved;
123} dmov_sg;
124
125/* bits for the cmd field of the above structures */
126
127#define CMD_LC (1 << 31) /* last command */
128#define CMD_FR (1 << 22) /* force result -- does not work? */
129#define CMD_OCU (1 << 21) /* other channel unblock */
130#define CMD_OCB (1 << 20) /* other channel block */
131#define CMD_TCB (1 << 19) /* ? */
132#define CMD_DAH (1 << 18) /* destination address hold -- does not work?*/
133#define CMD_SAH (1 << 17) /* source address hold -- does not work? */
134
135#define CMD_MODE_SINGLE (0 << 0) /* dmov_s structure used */
136#define CMD_MODE_SG (1 << 0) /* untested */
137#define CMD_MODE_IND_SG (2 << 0) /* untested */
138#define CMD_MODE_BOX (3 << 0) /* untested */
139
140#define CMD_DST_SWAP_BYTES (1 << 14) /* exchange each byte n with byte n+1 */
141#define CMD_DST_SWAP_SHORTS (1 << 15) /* exchange each short n with short n+1 */
142#define CMD_DST_SWAP_WORDS (1 << 16) /* exchange each word n with word n+1 */
143
144#define CMD_SRC_SWAP_BYTES (1 << 11) /* exchange each byte n with byte n+1 */
145#define CMD_SRC_SWAP_SHORTS (1 << 12) /* exchange each short n with short n+1 */
146#define CMD_SRC_SWAP_WORDS (1 << 13) /* exchange each word n with word n+1 */
147
148#define CMD_DST_CRCI(n) (((n) & 15) << 7)
149#define CMD_SRC_CRCI(n) (((n) & 15) << 3)
150
151#endif
diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S
new file mode 100644
index 000000000000..d2259486bcb1
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/entry-macro.S
@@ -0,0 +1,38 @@
1/* arch/arm/mach-msm7200/include/mach/entry-macro.S
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <mach/msm_iomap.h>
18
19 .macro disable_fiq
20 .endm
21
22 .macro get_irqnr_preamble, base, tmp
23 @ enable imprecise aborts
24 cpsie a
25 mov \base, #MSM_VIC_BASE
26 .endm
27
28 .macro arch_ret_to_user, tmp1, tmp2
29 .endm
30
31 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
32 @ 0xD0 has irq# or old irq# if the irq has been handled
33 @ 0xD4 has irq# or -1 if none pending *but* if you just
34 @ read 0xD4 you never get the first irq for some reason
35 ldr \irqnr, [\base, #0xD0]
36 ldr \irqnr, [\base, #0xD4]
37 cmp \irqnr, #0xffffffff
38 .endm
diff --git a/arch/arm/mach-msm/include/mach/hardware.h b/arch/arm/mach-msm/include/mach/hardware.h
new file mode 100644
index 000000000000..2d126091ae41
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/hardware.h
@@ -0,0 +1,18 @@
1/* arch/arm/mach-msm/include/mach/hardware.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MSM_HARDWARE_H
17
18#endif
diff --git a/arch/arm/mach-msm/include/mach/io.h b/arch/arm/mach-msm/include/mach/io.h
new file mode 100644
index 000000000000..c6a2feb268b0
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/io.h
@@ -0,0 +1,33 @@
1/* arch/arm/mach-msm/include/mach/io.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARM_ARCH_IO_H
17#define __ASM_ARM_ARCH_IO_H
18
19#define IO_SPACE_LIMIT 0xffffffff
20
21#define __arch_ioremap __msm_ioremap
22#define __arch_iounmap __iounmap
23
24void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype);
25
26static inline void __iomem *__io(unsigned long addr)
27{
28 return (void __iomem *)addr;
29}
30#define __io(a) __io(a)
31#define __mem_pci(a) (a)
32
33#endif
diff --git a/arch/arm/mach-msm/include/mach/irqs.h b/arch/arm/mach-msm/include/mach/irqs.h
new file mode 100644
index 000000000000..9dd4cf8a2693
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/irqs.h
@@ -0,0 +1,90 @@
1/* arch/arm/mach-msm/include/mach/irqs.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef __ASM_ARCH_MSM_IRQS_H
18#define __ASM_ARCH_MSM_IRQS_H
19
20/* MSM ARM11 Interrupt Numbers */
21/* See 80-VE113-1 A, pp219-221 */
22
23#define INT_A9_M2A_0 0
24#define INT_A9_M2A_1 1
25#define INT_A9_M2A_2 2
26#define INT_A9_M2A_3 3
27#define INT_A9_M2A_4 4
28#define INT_A9_M2A_5 5
29#define INT_A9_M2A_6 6
30#define INT_GP_TIMER_EXP 7
31#define INT_DEBUG_TIMER_EXP 8
32#define INT_UART1 9
33#define INT_UART2 10
34#define INT_UART3 11
35#define INT_UART1_RX 12
36#define INT_UART2_RX 13
37#define INT_UART3_RX 14
38#define INT_USB_OTG 15
39#define INT_MDDI_PRI 16
40#define INT_MDDI_EXT 17
41#define INT_MDDI_CLIENT 18
42#define INT_MDP 19
43#define INT_GRAPHICS 20
44#define INT_ADM_AARM 21
45#define INT_ADSP_A11 22
46#define INT_ADSP_A9_A11 23
47#define INT_SDC1_0 24
48#define INT_SDC1_1 25
49#define INT_SDC2_0 26
50#define INT_SDC2_1 27
51#define INT_KEYSENSE 28
52#define INT_TCHSCRN_SSBI 29
53#define INT_TCHSCRN1 30
54#define INT_TCHSCRN2 31
55
56#define INT_GPIO_GROUP1 (32 + 0)
57#define INT_GPIO_GROUP2 (32 + 1)
58#define INT_PWB_I2C (32 + 2)
59#define INT_SOFTRESET (32 + 3)
60#define INT_NAND_WR_ER_DONE (32 + 4)
61#define INT_NAND_OP_DONE (32 + 5)
62#define INT_PBUS_ARM11 (32 + 6)
63#define INT_AXI_MPU_SMI (32 + 7)
64#define INT_AXI_MPU_EBI1 (32 + 8)
65#define INT_AD_HSSD (32 + 9)
66#define INT_ARM11_PMU (32 + 10)
67#define INT_ARM11_DMA (32 + 11)
68#define INT_TSIF_IRQ (32 + 12)
69#define INT_UART1DM_IRQ (32 + 13)
70#define INT_UART1DM_RX (32 + 14)
71#define INT_USB_HS (32 + 15)
72#define INT_SDC3_0 (32 + 16)
73#define INT_SDC3_1 (32 + 17)
74#define INT_SDC4_0 (32 + 18)
75#define INT_SDC4_1 (32 + 19)
76#define INT_UART2DM_RX (32 + 20)
77#define INT_UART2DM_IRQ (32 + 21)
78
79/* 22-31 are reserved */
80
81#define MSM_IRQ_BIT(irq) (1 << ((irq) & 31))
82
83#define NR_MSM_IRQS 64
84#define NR_GPIO_IRQS 122
85#define NR_BOARD_IRQS 64
86#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS)
87
88#define MSM_GPIO_TO_INT(n) (NR_MSM_IRQS + (n))
89
90#endif
diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h
new file mode 100644
index 000000000000..63fd47f2e62e
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/memory.h
@@ -0,0 +1,27 @@
1/* arch/arm/mach-msm/include/mach/memory.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MEMORY_H
17#define __ASM_ARCH_MEMORY_H
18
19/* physical offset of RAM */
20#define PHYS_OFFSET UL(0x10000000)
21
22/* bus address and physical addresses are identical */
23#define __virt_to_bus(x) __virt_to_phys(x)
24#define __bus_to_virt(x) __phys_to_virt(x)
25
26#endif
27
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
new file mode 100644
index 000000000000..e221f58ceea3
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -0,0 +1,104 @@
1/* arch/arm/mach-msm/include/mach/msm_iomap.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 *
16 * The MSM peripherals are spread all over across 768MB of physical
17 * space, which makes just having a simple IO_ADDRESS macro to slide
18 * them into the right virtual location rough. Instead, we will
19 * provide a master phys->virt mapping for peripherals here.
20 *
21 */
22
23#ifndef __ASM_ARCH_MSM_IOMAP_H
24#define __ASM_ARCH_MSM_IOMAP_H
25
26#include <asm/sizes.h>
27
28/* Physical base address and size of peripherals.
29 * Ordered by the virtual base addresses they will be mapped at.
30 *
31 * MSM_VIC_BASE must be an value that can be loaded via a "mov"
32 * instruction, otherwise entry-macro.S will not compile.
33 *
34 * If you add or remove entries here, you'll want to edit the
35 * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
36 * changes.
37 *
38 */
39
40#define MSM_VIC_BASE 0xE0000000
41#define MSM_VIC_PHYS 0xC0000000
42#define MSM_VIC_SIZE SZ_4K
43
44#define MSM_CSR_BASE 0xE0001000
45#define MSM_CSR_PHYS 0xC0100000
46#define MSM_CSR_SIZE SZ_4K
47
48#define MSM_GPT_PHYS MSM_CSR_PHYS
49#define MSM_GPT_BASE MSM_CSR_BASE
50#define MSM_GPT_SIZE SZ_4K
51
52#define MSM_DMOV_BASE 0xE0002000
53#define MSM_DMOV_PHYS 0xA9700000
54#define MSM_DMOV_SIZE SZ_4K
55
56#define MSM_UART1_BASE 0xE0003000
57#define MSM_UART1_PHYS 0xA9A00000
58#define MSM_UART1_SIZE SZ_4K
59
60#define MSM_UART2_BASE 0xE0004000
61#define MSM_UART2_PHYS 0xA9B00000
62#define MSM_UART2_SIZE SZ_4K
63
64#define MSM_UART3_BASE 0xE0005000
65#define MSM_UART3_PHYS 0xA9C00000
66#define MSM_UART3_SIZE SZ_4K
67
68#define MSM_I2C_BASE 0xE0006000
69#define MSM_I2C_PHYS 0xA9900000
70#define MSM_I2C_SIZE SZ_4K
71
72#define MSM_GPIO1_BASE 0xE0007000
73#define MSM_GPIO1_PHYS 0xA9200000
74#define MSM_GPIO1_SIZE SZ_4K
75
76#define MSM_GPIO2_BASE 0xE0008000
77#define MSM_GPIO2_PHYS 0xA9300000
78#define MSM_GPIO2_SIZE SZ_4K
79
80#define MSM_HSUSB_BASE 0xE0009000
81#define MSM_HSUSB_PHYS 0xA0800000
82#define MSM_HSUSB_SIZE SZ_4K
83
84#define MSM_CLK_CTL_BASE 0xE000A000
85#define MSM_CLK_CTL_PHYS 0xA8600000
86#define MSM_CLK_CTL_SIZE SZ_4K
87
88#define MSM_PMDH_BASE 0xE000B000
89#define MSM_PMDH_PHYS 0xAA600000
90#define MSM_PMDH_SIZE SZ_4K
91
92#define MSM_EMDH_BASE 0xE000C000
93#define MSM_EMDH_PHYS 0xAA700000
94#define MSM_EMDH_SIZE SZ_4K
95
96#define MSM_MDP_BASE 0xE0010000
97#define MSM_MDP_PHYS 0xAA200000
98#define MSM_MDP_SIZE 0x000F0000
99
100#define MSM_SHARED_RAM_BASE 0xE0100000
101#define MSM_SHARED_RAM_PHYS 0x01F00000
102#define MSM_SHARED_RAM_SIZE SZ_1M
103
104#endif
diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h
new file mode 100644
index 000000000000..f05ad2e0f235
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/system.h
@@ -0,0 +1,23 @@
1/* arch/arm/mach-msm/include/mach/system.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <mach/hardware.h>
17
18void arch_idle(void);
19
20static inline void arch_reset(char mode)
21{
22 for (;;) ; /* depends on IPC w/ other core */
23}
diff --git a/arch/arm/mach-msm/include/mach/timex.h b/arch/arm/mach-msm/include/mach/timex.h
new file mode 100644
index 000000000000..a62e6b215aec
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/timex.h
@@ -0,0 +1,21 @@
1/* arch/arm/mach-msm/include/mach/timex.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MSM_TIMEX_H
17#define __ASM_ARCH_MSM_TIMEX_H
18
19#define CLOCK_TICK_RATE 1000000
20
21#endif
diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h
new file mode 100644
index 000000000000..026e8955ace9
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/uncompress.h
@@ -0,0 +1,36 @@
1/* arch/arm/mach-msm/include/mach/uncompress.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
17
18#include "hardware.h"
19
20static void putc(int c)
21{
22}
23
24static inline void flush(void)
25{
26}
27
28static inline void arch_decomp_setup(void)
29{
30}
31
32static inline void arch_decomp_wdog(void)
33{
34}
35
36#endif
diff --git a/arch/arm/mach-msm/include/mach/vmalloc.h b/arch/arm/mach-msm/include/mach/vmalloc.h
new file mode 100644
index 000000000000..05f81fd8623c
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/vmalloc.h
@@ -0,0 +1,22 @@
1/* arch/arm/mach-msm/include/mach/vmalloc.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MSM_VMALLOC_H
17#define __ASM_ARCH_MSM_VMALLOC_H
18
19#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
20
21#endif
22
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index eca4283bbcb2..5976200de99b 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -19,13 +19,13 @@
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/init.h> 20#include <linux/init.h>
21 21
22#include <asm/arch/hardware.h> 22#include <mach/hardware.h>
23#include <asm/io.h> 23#include <asm/io.h>
24#include <asm/page.h> 24#include <asm/page.h>
25#include <asm/arch/msm_iomap.h> 25#include <mach/msm_iomap.h>
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27 27
28#include <asm/arch/board.h> 28#include <mach/board.h>
29 29
30#define MSM_DEVICE(name) { \ 30#define MSM_DEVICE(name) { \
31 .virtual = MSM_##name##_BASE, \ 31 .virtual = MSM_##name##_BASE, \
diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c
index 0535b39261f0..66901baf8c8e 100644
--- a/arch/arm/mach-msm/irq.c
+++ b/arch/arm/mach-msm/irq.c
@@ -21,11 +21,11 @@
21#include <linux/timer.h> 21#include <linux/timer.h>
22 22
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <asm/arch/hardware.h> 24#include <mach/hardware.h>
25 25
26#include <asm/io.h> 26#include <asm/io.h>
27 27
28#include <asm/arch/msm_iomap.h> 28#include <mach/msm_iomap.h>
29 29
30#define VIC_REG(off) (MSM_VIC_BASE + (off)) 30#define VIC_REG(off) (MSM_VIC_BASE + (off))
31 31
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index bd4732d1ab3e..9f02d7dca985 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -22,7 +22,7 @@
22#include <linux/delay.h> 22#include <linux/delay.h>
23 23
24#include <asm/mach/time.h> 24#include <asm/mach/time.h>
25#include <asm/arch/msm_iomap.h> 25#include <mach/msm_iomap.h>
26 26
27#include <asm/io.h> 27#include <asm/io.h>
28 28