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authorLinus Torvalds <torvalds@linux-foundation.org>2011-05-23 18:15:27 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-05-23 18:15:27 -0400
commit42cd71bf1e3a081b3150018bbf448cb6c8a844a5 (patch)
tree4a5d2eb0444255e4ad827a76dbd1417dd3876db6 /arch/arm/mach-msm
parentf5039935ac685b3b9b8c13fbc33cac8643dee32e (diff)
parent9a55d9752d8abfc62f1ab05ccc790d22a0c8e7c0 (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (137 commits) ARM: bcmring: convert to use sp804 clockevents ARM: bcmring: convert to sp804 clocksource ARM: 6912/1: bcmring: Add clkdev table in init_early clockevents: ARM sp804: obtain sp804 timer rate via clks clockevents: ARM sp804: allow clockevent name to be specified clocksource: ARM sp804: obtain sp804 timer rate via clks clocksource: ARM sp804: allow clocksource name to be specified clocksource: convert OMAP1 to 32-bit down counting clocksource clocksource: convert MXS timrotv2 to 32-bit down counting clocksource clocksource: convert SPEAr platforms 16-bit up counting clocksource clocksource: convert Integrator/AP 16-bit down counting clocksource clocksource: convert W90x900 24-bit down counting clocksource clocksource: convert ARM 32-bit down counting clocksources clocksource: convert ARM 32-bit up counting clocksources clocksource: add common mmio clocksource ARM: update sa1100 to reflect PXA updates ARM: omap1: convert to using readl/writel instead of volatile struct ARM: omap1: delete useless interrupt handler ARM: s5p: consolidate selection of timer register ARM: 6939/1: fix missing 'cpu_relax()' declaration ...
Diffstat (limited to 'arch/arm/mach-msm')
-rw-r--r--arch/arm/mach-msm/gpio-v2.c10
-rw-r--r--arch/arm/mach-msm/include/mach/smp.h23
-rw-r--r--arch/arm/mach-msm/platsmp.c4
3 files changed, 11 insertions, 26 deletions
diff --git a/arch/arm/mach-msm/gpio-v2.c b/arch/arm/mach-msm/gpio-v2.c
index 56a964e52ad3..cc9c4fd7cccc 100644
--- a/arch/arm/mach-msm/gpio-v2.c
+++ b/arch/arm/mach-msm/gpio-v2.c
@@ -27,6 +27,9 @@
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/spinlock.h> 29#include <linux/spinlock.h>
30
31#include <asm/mach/irq.h>
32
30#include <mach/msm_iomap.h> 33#include <mach/msm_iomap.h>
31#include "gpiomux.h" 34#include "gpiomux.h"
32 35
@@ -309,8 +312,10 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
309 */ 312 */
310static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc) 313static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc)
311{ 314{
312 struct irq_data *data = irq_desc_get_irq_data(desc);
313 unsigned long i; 315 unsigned long i;
316 struct irq_chip *chip = irq_desc_get_chip(desc);
317
318 chained_irq_enter(chip, desc);
314 319
315 for (i = find_first_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS); 320 for (i = find_first_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS);
316 i < NR_GPIO_IRQS; 321 i < NR_GPIO_IRQS;
@@ -319,7 +324,8 @@ static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc)
319 generic_handle_irq(msm_gpio_to_irq(&msm_gpio.gpio_chip, 324 generic_handle_irq(msm_gpio_to_irq(&msm_gpio.gpio_chip,
320 i)); 325 i));
321 } 326 }
322 data->chip->irq_ack(data); 327
328 chained_irq_exit(chip, desc);
323} 329}
324 330
325static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) 331static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
diff --git a/arch/arm/mach-msm/include/mach/smp.h b/arch/arm/mach-msm/include/mach/smp.h
deleted file mode 100644
index 3c01000ecc80..000000000000
--- a/arch/arm/mach-msm/include/mach/smp.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#ifndef __ASM_ARCH_MSM_SMP_H
14#define __ASM_ARCH_MSM_SMP_H
15
16#include <asm/hardware/gic.h>
17
18static inline void smp_cross_call(const struct cpumask *mask, int ipi)
19{
20 gic_raise_softirq(mask, ipi);
21}
22
23#endif
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 0f427bc94447..2034098cf015 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -119,7 +119,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
119 * the boot monitor to read the system wide flags register, 119 * the boot monitor to read the system wide flags register,
120 * and branch to the address found there. 120 * and branch to the address found there.
121 */ 121 */
122 smp_cross_call(cpumask_of(cpu), 1); 122 gic_raise_softirq(cpumask_of(cpu), 1);
123 123
124 timeout = jiffies + (1 * HZ); 124 timeout = jiffies + (1 * HZ);
125 while (time_before(jiffies, timeout)) { 125 while (time_before(jiffies, timeout)) {
@@ -151,6 +151,8 @@ void __init smp_init_cpus(void)
151 151
152 for (i = 0; i < NR_CPUS; i++) 152 for (i = 0; i < NR_CPUS; i++)
153 set_cpu_possible(i, true); 153 set_cpu_possible(i, true);
154
155 set_smp_cross_call(gic_raise_softirq);
154} 156}
155 157
156void __init platform_smp_prepare_cpus(unsigned int max_cpus) 158void __init platform_smp_prepare_cpus(unsigned int max_cpus)