aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-msm
diff options
context:
space:
mode:
authorOlof Johansson <olof@lixom.net>2011-12-20 00:12:24 -0500
committerOlof Johansson <olof@lixom.net>2011-12-20 00:13:41 -0500
commit844e8a16f25568eefd02a6bfb40bdd9bc04704b8 (patch)
treefdfe4de420c66517a2e4a2a25a454997c6210e95 /arch/arm/mach-msm
parent5ecdd39f6cdd57aa42e072bf30aa7239fd109d7a (diff)
parenta53bfa07369b7c3448a60d29f0fc2e81751ed0b7 (diff)
Merge branch 'picoxcell/cleanup' into next/cleanup
* picoxcell/cleanup: (4 commits) MAINTAINERS: add maintainer entry for Picochip picoxcell ARM: picoxcell: move io mappings to common.c ARM: picoxcell: don't reserve irq_descs ARM: picoxcell: remove mach/memory.h Conflicts: arch/arm/mach-at91/setup.c
Diffstat (limited to 'arch/arm/mach-msm')
-rw-r--r--arch/arm/mach-msm/board-msm8960.c2
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c4
-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro-qgic.S17
-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro-vic.S37
-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro.S27
-rw-r--r--arch/arm/mach-msm/include/mach/vmalloc.h22
6 files changed, 29 insertions, 80 deletions
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index 6dc1cbd2a595..ed3598128530 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -99,6 +99,7 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
99 .map_io = msm8960_map_io, 99 .map_io = msm8960_map_io,
100 .init_irq = msm8960_init_irq, 100 .init_irq = msm8960_init_irq,
101 .timer = &msm_timer, 101 .timer = &msm_timer,
102 .handle_irq = gic_handle_irq,
102 .init_machine = msm8960_sim_init, 103 .init_machine = msm8960_sim_init,
103MACHINE_END 104MACHINE_END
104 105
@@ -108,6 +109,7 @@ MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
108 .map_io = msm8960_map_io, 109 .map_io = msm8960_map_io,
109 .init_irq = msm8960_init_irq, 110 .init_irq = msm8960_init_irq,
110 .timer = &msm_timer, 111 .timer = &msm_timer,
112 .handle_irq = gic_handle_irq,
111 .init_machine = msm8960_rumi3_init, 113 .init_machine = msm8960_rumi3_init,
112MACHINE_END 114MACHINE_END
113 115
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 44bf71688373..0a113424632c 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -108,6 +108,7 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
108 .reserve = msm8x60_reserve, 108 .reserve = msm8x60_reserve,
109 .map_io = msm8x60_map_io, 109 .map_io = msm8x60_map_io,
110 .init_irq = msm8x60_init_irq, 110 .init_irq = msm8x60_init_irq,
111 .handle_irq = gic_handle_irq,
111 .init_machine = msm8x60_init, 112 .init_machine = msm8x60_init,
112 .timer = &msm_timer, 113 .timer = &msm_timer,
113MACHINE_END 114MACHINE_END
@@ -117,6 +118,7 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
117 .reserve = msm8x60_reserve, 118 .reserve = msm8x60_reserve,
118 .map_io = msm8x60_map_io, 119 .map_io = msm8x60_map_io,
119 .init_irq = msm8x60_init_irq, 120 .init_irq = msm8x60_init_irq,
121 .handle_irq = gic_handle_irq,
120 .init_machine = msm8x60_init, 122 .init_machine = msm8x60_init,
121 .timer = &msm_timer, 123 .timer = &msm_timer,
122MACHINE_END 124MACHINE_END
@@ -126,6 +128,7 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
126 .reserve = msm8x60_reserve, 128 .reserve = msm8x60_reserve,
127 .map_io = msm8x60_map_io, 129 .map_io = msm8x60_map_io,
128 .init_irq = msm8x60_init_irq, 130 .init_irq = msm8x60_init_irq,
131 .handle_irq = gic_handle_irq,
129 .init_machine = msm8x60_init, 132 .init_machine = msm8x60_init,
130 .timer = &msm_timer, 133 .timer = &msm_timer,
131MACHINE_END 134MACHINE_END
@@ -135,6 +138,7 @@ MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
135 .reserve = msm8x60_reserve, 138 .reserve = msm8x60_reserve,
136 .map_io = msm8x60_map_io, 139 .map_io = msm8x60_map_io,
137 .init_irq = msm8x60_init_irq, 140 .init_irq = msm8x60_init_irq,
141 .handle_irq = gic_handle_irq,
138 .init_machine = msm8x60_init, 142 .init_machine = msm8x60_init,
139 .timer = &msm_timer, 143 .timer = &msm_timer,
140MACHINE_END 144MACHINE_END
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
deleted file mode 100644
index 717076f3ca73..000000000000
--- a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * Low-level IRQ helper macros
3 *
4 * Copyright (c) 2010, Code Aurora Forum. All rights reserved.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <asm/hardware/entry-macro-gic.S>
12
13 .macro disable_fiq
14 .endm
15
16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-vic.S b/arch/arm/mach-msm/include/mach/entry-macro-vic.S
deleted file mode 100644
index 70563ed11b36..000000000000
--- a/arch/arm/mach-msm/include/mach/entry-macro-vic.S
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Author: Brian Swetland <swetland@google.com>
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <mach/msm_iomap.h>
17
18 .macro disable_fiq
19 .endm
20
21 .macro get_irqnr_preamble, base, tmp
22 @ enable imprecise aborts
23 cpsie a
24 mov \base, #MSM_VIC_BASE
25 .endm
26
27 .macro arch_ret_to_user, tmp1, tmp2
28 .endm
29
30 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
31 @ 0xD0 has irq# or old irq# if the irq has been handled
32 @ 0xD4 has irq# or -1 if none pending *but* if you just
33 @ read 0xD4 you never get the first irq for some reason
34 ldr \irqnr, [\base, #0xD0]
35 ldr \irqnr, [\base, #0xD4]
36 cmp \irqnr, #0xffffffff
37 .endm
diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S
index b16f082eeb6f..41f7003ef34f 100644
--- a/arch/arm/mach-msm/include/mach/entry-macro.S
+++ b/arch/arm/mach-msm/include/mach/entry-macro.S
@@ -16,8 +16,27 @@
16 * 16 *
17 */ 17 */
18 18
19#if defined(CONFIG_ARM_GIC) 19 .macro disable_fiq
20#include <mach/entry-macro-qgic.S> 20 .endm
21#else 21
22#include <mach/entry-macro-vic.S> 22 .macro arch_ret_to_user, tmp1, tmp2
23 .endm
24
25#if !defined(CONFIG_ARM_GIC)
26#include <mach/msm_iomap.h>
27
28 .macro get_irqnr_preamble, base, tmp
29 @ enable imprecise aborts
30 cpsie a
31 mov \base, #MSM_VIC_BASE
32 .endm
33
34 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
35 @ 0xD0 has irq# or old irq# if the irq has been handled
36 @ 0xD4 has irq# or -1 if none pending *but* if you just
37 @ read 0xD4 you never get the first irq for some reason
38 ldr \irqnr, [\base, #0xD0]
39 ldr \irqnr, [\base, #0xD4]
40 cmp \irqnr, #0xffffffff
41 .endm
23#endif 42#endif
diff --git a/arch/arm/mach-msm/include/mach/vmalloc.h b/arch/arm/mach-msm/include/mach/vmalloc.h
deleted file mode 100644
index d138448eff16..000000000000
--- a/arch/arm/mach-msm/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* arch/arm/mach-msm/include/mach/vmalloc.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MSM_VMALLOC_H
17#define __ASM_ARCH_MSM_VMALLOC_H
18
19#define VMALLOC_END 0xd0000000UL
20
21#endif
22