diff options
author | David Brown <davidb@codeaurora.org> | 2011-05-12 03:54:36 -0400 |
---|---|---|
committer | David Brown <davidb@codeaurora.org> | 2011-08-01 07:57:59 -0400 |
commit | 03db0729b7603202f7d3a2bf2ec7e89a1ad44a17 (patch) | |
tree | 10aa5169c72f2199d21ee41c064a3974fd91c870 /arch/arm/mach-msm | |
parent | ce427c384ea4b7ec48c7e6367b7b64457eba87b3 (diff) |
msm: Remove chip-ifdefs for GPIO io mappings
The two GPIO controllers are always mapped to the same virtual address
across all MSM devices. Instead of selecting this at compile time,
determine the physical address at runtime, eliminating yet something
else preventing multiple MSM targets from being compiled into the same
kernel.
Change-Id: I1672219d978ab6243526adeda6badf49472baa27
Signed-off-by: David Brown <davidb@codeaurora.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Diffstat (limited to 'arch/arm/mach-msm')
-rw-r--r-- | arch/arm/mach-msm/include/mach/msm_iomap-7x00.h | 10 | ||||
-rw-r--r-- | arch/arm/mach-msm/include/mach/msm_iomap-7x30.h | 10 | ||||
-rw-r--r-- | arch/arm/mach-msm/include/mach/msm_iomap-8x50.h | 10 | ||||
-rw-r--r-- | arch/arm/mach-msm/include/mach/msm_iomap.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-msm/io.c | 12 |
5 files changed, 20 insertions, 24 deletions
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h index 8f99d97615a0..94fe9fe6feb3 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h | |||
@@ -55,13 +55,11 @@ | |||
55 | #define MSM_DMOV_PHYS 0xA9700000 | 55 | #define MSM_DMOV_PHYS 0xA9700000 |
56 | #define MSM_DMOV_SIZE SZ_4K | 56 | #define MSM_DMOV_SIZE SZ_4K |
57 | 57 | ||
58 | #define MSM_GPIO1_BASE IOMEM(0xE0003000) | 58 | #define MSM7X00_GPIO1_PHYS 0xA9200000 |
59 | #define MSM_GPIO1_PHYS 0xA9200000 | 59 | #define MSM7X00_GPIO1_SIZE SZ_4K |
60 | #define MSM_GPIO1_SIZE SZ_4K | ||
61 | 60 | ||
62 | #define MSM_GPIO2_BASE IOMEM(0xE0004000) | 61 | #define MSM7X00_GPIO2_PHYS 0xA9300000 |
63 | #define MSM_GPIO2_PHYS 0xA9300000 | 62 | #define MSM7X00_GPIO2_SIZE SZ_4K |
64 | #define MSM_GPIO2_SIZE SZ_4K | ||
65 | 63 | ||
66 | #define MSM_CLK_CTL_BASE IOMEM(0xE0005000) | 64 | #define MSM_CLK_CTL_BASE IOMEM(0xE0005000) |
67 | #define MSM_CLK_CTL_PHYS 0xA8600000 | 65 | #define MSM_CLK_CTL_PHYS 0xA8600000 |
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h index 4d84be15955e..37694442d1bd 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h | |||
@@ -46,13 +46,11 @@ | |||
46 | #define MSM_DMOV_PHYS 0xAC400000 | 46 | #define MSM_DMOV_PHYS 0xAC400000 |
47 | #define MSM_DMOV_SIZE SZ_4K | 47 | #define MSM_DMOV_SIZE SZ_4K |
48 | 48 | ||
49 | #define MSM_GPIO1_BASE IOMEM(0xE0003000) | 49 | #define MSM7X30_GPIO1_PHYS 0xAC001000 |
50 | #define MSM_GPIO1_PHYS 0xAC001000 | 50 | #define MSM7X30_GPIO1_SIZE SZ_4K |
51 | #define MSM_GPIO1_SIZE SZ_4K | ||
52 | 51 | ||
53 | #define MSM_GPIO2_BASE IOMEM(0xE0004000) | 52 | #define MSM7X30_GPIO2_PHYS 0xAC101000 |
54 | #define MSM_GPIO2_PHYS 0xAC101000 | 53 | #define MSM7X30_GPIO2_SIZE SZ_4K |
55 | #define MSM_GPIO2_SIZE SZ_4K | ||
56 | 54 | ||
57 | #define MSM_CLK_CTL_BASE IOMEM(0xE0005000) | 55 | #define MSM_CLK_CTL_BASE IOMEM(0xE0005000) |
58 | #define MSM_CLK_CTL_PHYS 0xAB800000 | 56 | #define MSM_CLK_CTL_PHYS 0xAB800000 |
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h index d4143201999f..d67cd73316f4 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h | |||
@@ -46,13 +46,11 @@ | |||
46 | #define MSM_DMOV_PHYS 0xA9700000 | 46 | #define MSM_DMOV_PHYS 0xA9700000 |
47 | #define MSM_DMOV_SIZE SZ_4K | 47 | #define MSM_DMOV_SIZE SZ_4K |
48 | 48 | ||
49 | #define MSM_GPIO1_BASE IOMEM(0xE0003000) | 49 | #define QSD8X50_GPIO1_PHYS 0xA9000000 |
50 | #define MSM_GPIO1_PHYS 0xA9000000 | 50 | #define QSD8X50_GPIO1_SIZE SZ_4K |
51 | #define MSM_GPIO1_SIZE SZ_4K | ||
52 | 51 | ||
53 | #define MSM_GPIO2_BASE IOMEM(0xE0004000) | 52 | #define QSD8X50_GPIO2_PHYS 0xA9100000 |
54 | #define MSM_GPIO2_PHYS 0xA9100000 | 53 | #define QSD8X50_GPIO2_SIZE SZ_4K |
55 | #define MSM_GPIO2_SIZE SZ_4K | ||
56 | 54 | ||
57 | #define MSM_CLK_CTL_BASE IOMEM(0xE0005000) | 55 | #define MSM_CLK_CTL_BASE IOMEM(0xE0005000) |
58 | #define MSM_CLK_CTL_PHYS 0xA8600000 | 56 | #define MSM_CLK_CTL_PHYS 0xA8600000 |
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h index 2f494b6a9d0a..4ded15238b60 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap.h | |||
@@ -61,5 +61,7 @@ | |||
61 | #define MSM_QGIC_CPU_BASE IOMEM(0xF0001000) | 61 | #define MSM_QGIC_CPU_BASE IOMEM(0xF0001000) |
62 | #define MSM_TMR_BASE IOMEM(0xF0200000) | 62 | #define MSM_TMR_BASE IOMEM(0xF0200000) |
63 | #define MSM_TMR0_BASE IOMEM(0xF0201000) | 63 | #define MSM_TMR0_BASE IOMEM(0xF0201000) |
64 | #define MSM_GPIO1_BASE IOMEM(0xE0003000) | ||
65 | #define MSM_GPIO2_BASE IOMEM(0xE0004000) | ||
64 | 66 | ||
65 | #endif | 67 | #endif |
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c index cec6ed1c91d3..140ddbbc3a8a 100644 --- a/arch/arm/mach-msm/io.c +++ b/arch/arm/mach-msm/io.c | |||
@@ -43,8 +43,8 @@ static struct map_desc msm_io_desc[] __initdata = { | |||
43 | MSM_DEVICE(VIC), | 43 | MSM_DEVICE(VIC), |
44 | MSM_CHIP_DEVICE(CSR, MSM7X00), | 44 | MSM_CHIP_DEVICE(CSR, MSM7X00), |
45 | MSM_DEVICE(DMOV), | 45 | MSM_DEVICE(DMOV), |
46 | MSM_DEVICE(GPIO1), | 46 | MSM_CHIP_DEVICE(GPIO1, MSM7X00), |
47 | MSM_DEVICE(GPIO2), | 47 | MSM_CHIP_DEVICE(GPIO2, MSM7X00), |
48 | MSM_DEVICE(CLK_CTL), | 48 | MSM_DEVICE(CLK_CTL), |
49 | #ifdef CONFIG_MSM_DEBUG_UART | 49 | #ifdef CONFIG_MSM_DEBUG_UART |
50 | MSM_DEVICE(DEBUG_UART), | 50 | MSM_DEVICE(DEBUG_UART), |
@@ -76,8 +76,8 @@ static struct map_desc qsd8x50_io_desc[] __initdata = { | |||
76 | MSM_DEVICE(VIC), | 76 | MSM_DEVICE(VIC), |
77 | MSM_CHIP_DEVICE(CSR, QSD8X50), | 77 | MSM_CHIP_DEVICE(CSR, QSD8X50), |
78 | MSM_DEVICE(DMOV), | 78 | MSM_DEVICE(DMOV), |
79 | MSM_DEVICE(GPIO1), | 79 | MSM_CHIP_DEVICE(GPIO1, QSD8X50), |
80 | MSM_DEVICE(GPIO2), | 80 | MSM_CHIP_DEVICE(GPIO2, QSD8X50), |
81 | MSM_DEVICE(CLK_CTL), | 81 | MSM_DEVICE(CLK_CTL), |
82 | MSM_DEVICE(SIRC), | 82 | MSM_DEVICE(SIRC), |
83 | MSM_DEVICE(SCPLL), | 83 | MSM_DEVICE(SCPLL), |
@@ -135,8 +135,8 @@ static struct map_desc msm7x30_io_desc[] __initdata = { | |||
135 | MSM_DEVICE(VIC), | 135 | MSM_DEVICE(VIC), |
136 | MSM_CHIP_DEVICE(CSR, MSM7X30), | 136 | MSM_CHIP_DEVICE(CSR, MSM7X30), |
137 | MSM_DEVICE(DMOV), | 137 | MSM_DEVICE(DMOV), |
138 | MSM_DEVICE(GPIO1), | 138 | MSM_CHIP_DEVICE(GPIO1, MSM7X30), |
139 | MSM_DEVICE(GPIO2), | 139 | MSM_CHIP_DEVICE(GPIO2, MSM7X30), |
140 | MSM_DEVICE(CLK_CTL), | 140 | MSM_DEVICE(CLK_CTL), |
141 | MSM_DEVICE(CLK_CTL_SH2), | 141 | MSM_DEVICE(CLK_CTL_SH2), |
142 | MSM_DEVICE(AD5), | 142 | MSM_DEVICE(AD5), |