aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-msm/irq.c
diff options
context:
space:
mode:
authorBrian Swetland <swetland@google.com>2008-09-10 17:00:53 -0400
committerBrian Swetland <swetland@google.com>2008-10-22 05:40:59 -0400
commitbcc0f6af0798e60e7527485f7125ed26632ce698 (patch)
treeac45678ea4131d7423f64025e8021106937dbf77 /arch/arm/mach-msm/irq.c
parentb8a16e1fdfe9caed734df0e157ad74ae2b13e3bd (diff)
[ARM] msm: clean up iomap and devices
- Add some more peripherals (sdcc, etc) to the iomap. - Remove virtual base addresses for devices that we should be passing physical addresses to drivers via resources and ioremap()ing. - don't try to use uarts for ll debug once the mmu is enabled due to problems with the peripheral window - make base addresses void __iomem * and fixup irq.c and timer.c - Remove common.c and bring in devices.c/devices.h similar to the PXA architecture. Signed-off-by: Brian Swetland <swetland@google.com>
Diffstat (limited to 'arch/arm/mach-msm/irq.c')
-rw-r--r--arch/arm/mach-msm/irq.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c
index 04b8d182ff8a..69ca0dd79bdf 100644
--- a/arch/arm/mach-msm/irq.c
+++ b/arch/arm/mach-msm/irq.c
@@ -66,20 +66,20 @@
66 66
67static void msm_irq_ack(unsigned int irq) 67static void msm_irq_ack(unsigned int irq)
68{ 68{
69 unsigned reg = VIC_INT_CLEAR0 + ((irq & 32) ? 4 : 0); 69 void __iomem *reg = VIC_INT_CLEAR0 + ((irq & 32) ? 4 : 0);
70 irq = 1 << (irq & 31); 70 irq = 1 << (irq & 31);
71 writel(irq, reg); 71 writel(irq, reg);
72} 72}
73 73
74static void msm_irq_mask(unsigned int irq) 74static void msm_irq_mask(unsigned int irq)
75{ 75{
76 unsigned reg = VIC_INT_ENCLEAR0 + ((irq & 32) ? 4 : 0); 76 void __iomem *reg = VIC_INT_ENCLEAR0 + ((irq & 32) ? 4 : 0);
77 writel(1 << (irq & 31), reg); 77 writel(1 << (irq & 31), reg);
78} 78}
79 79
80static void msm_irq_unmask(unsigned int irq) 80static void msm_irq_unmask(unsigned int irq)
81{ 81{
82 unsigned reg = VIC_INT_ENSET0 + ((irq & 32) ? 4 : 0); 82 void __iomem *reg = VIC_INT_ENSET0 + ((irq & 32) ? 4 : 0);
83 writel(1 << (irq & 31), reg); 83 writel(1 << (irq & 31), reg);
84} 84}
85 85
@@ -90,8 +90,8 @@ static int msm_irq_set_wake(unsigned int irq, unsigned int on)
90 90
91static int msm_irq_set_type(unsigned int irq, unsigned int flow_type) 91static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
92{ 92{
93 unsigned treg = VIC_INT_TYPE0 + ((irq & 32) ? 4 : 0); 93 void __iomem *treg = VIC_INT_TYPE0 + ((irq & 32) ? 4 : 0);
94 unsigned preg = VIC_INT_POLARITY0 + ((irq & 32) ? 4 : 0); 94 void __iomem *preg = VIC_INT_POLARITY0 + ((irq & 32) ? 4 : 0);
95 int b = 1 << (irq & 31); 95 int b = 1 << (irq & 31);
96 96
97 if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW)) 97 if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))