diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2010-11-29 04:37:34 -0500 |
---|---|---|
committer | Lennert Buytenhek <buytenh@wantstofly.org> | 2011-01-13 11:18:46 -0500 |
commit | 0f86ee082caa043d5e2990d42a1d5034d2a5caf6 (patch) | |
tree | beaa78970123f6effffc05a8ef9b29be06842482 /arch/arm/mach-msm/irq-vic.c | |
parent | a157f26b2e624ce457a8f16b54d93f6af1850f85 (diff) |
ARM: msm: irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Acked-by: Gregory Bean <gbean@codeaurora.org>
Acked-by: Daniel Walker <dwalker@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/irq-vic.c')
-rw-r--r-- | arch/arm/mach-msm/irq-vic.c | 65 |
1 files changed, 32 insertions, 33 deletions
diff --git a/arch/arm/mach-msm/irq-vic.c b/arch/arm/mach-msm/irq-vic.c index 99f2c3473033..68c28bbdc969 100644 --- a/arch/arm/mach-msm/irq-vic.c +++ b/arch/arm/mach-msm/irq-vic.c | |||
@@ -226,19 +226,18 @@ static inline void msm_irq_write_all_regs(void __iomem *base, unsigned int val) | |||
226 | writel(val, base + (i * 4)); | 226 | writel(val, base + (i * 4)); |
227 | } | 227 | } |
228 | 228 | ||
229 | static void msm_irq_ack(unsigned int irq) | 229 | static void msm_irq_ack(struct irq_data *d) |
230 | { | 230 | { |
231 | void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, irq); | 231 | void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, d->irq); |
232 | irq = 1 << (irq & 31); | 232 | writel(1 << (d->irq & 31), reg); |
233 | writel(irq, reg); | ||
234 | } | 233 | } |
235 | 234 | ||
236 | static void msm_irq_mask(unsigned int irq) | 235 | static void msm_irq_mask(struct irq_data *d) |
237 | { | 236 | { |
238 | void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENCLEAR0, irq); | 237 | void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENCLEAR0, d->irq); |
239 | unsigned index = VIC_INT_TO_REG_INDEX(irq); | 238 | unsigned index = VIC_INT_TO_REG_INDEX(d->irq); |
240 | uint32_t mask = 1UL << (irq & 31); | 239 | uint32_t mask = 1UL << (d->irq & 31); |
241 | int smsm_irq = msm_irq_to_smsm[irq]; | 240 | int smsm_irq = msm_irq_to_smsm[d->irq]; |
242 | 241 | ||
243 | msm_irq_shadow_reg[index].int_en[0] &= ~mask; | 242 | msm_irq_shadow_reg[index].int_en[0] &= ~mask; |
244 | writel(mask, reg); | 243 | writel(mask, reg); |
@@ -250,12 +249,12 @@ static void msm_irq_mask(unsigned int irq) | |||
250 | } | 249 | } |
251 | } | 250 | } |
252 | 251 | ||
253 | static void msm_irq_unmask(unsigned int irq) | 252 | static void msm_irq_unmask(struct irq_data *d) |
254 | { | 253 | { |
255 | void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENSET0, irq); | 254 | void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENSET0, d->irq); |
256 | unsigned index = VIC_INT_TO_REG_INDEX(irq); | 255 | unsigned index = VIC_INT_TO_REG_INDEX(d->irq); |
257 | uint32_t mask = 1UL << (irq & 31); | 256 | uint32_t mask = 1UL << (d->irq & 31); |
258 | int smsm_irq = msm_irq_to_smsm[irq]; | 257 | int smsm_irq = msm_irq_to_smsm[d->irq]; |
259 | 258 | ||
260 | msm_irq_shadow_reg[index].int_en[0] |= mask; | 259 | msm_irq_shadow_reg[index].int_en[0] |= mask; |
261 | writel(mask, reg); | 260 | writel(mask, reg); |
@@ -268,14 +267,14 @@ static void msm_irq_unmask(unsigned int irq) | |||
268 | } | 267 | } |
269 | } | 268 | } |
270 | 269 | ||
271 | static int msm_irq_set_wake(unsigned int irq, unsigned int on) | 270 | static int msm_irq_set_wake(struct irq_data *d, unsigned int on) |
272 | { | 271 | { |
273 | unsigned index = VIC_INT_TO_REG_INDEX(irq); | 272 | unsigned index = VIC_INT_TO_REG_INDEX(d->irq); |
274 | uint32_t mask = 1UL << (irq & 31); | 273 | uint32_t mask = 1UL << (d->irq & 31); |
275 | int smsm_irq = msm_irq_to_smsm[irq]; | 274 | int smsm_irq = msm_irq_to_smsm[d->irq]; |
276 | 275 | ||
277 | if (smsm_irq == 0) { | 276 | if (smsm_irq == 0) { |
278 | printk(KERN_ERR "msm_irq_set_wake: bad wakeup irq %d\n", irq); | 277 | printk(KERN_ERR "msm_irq_set_wake: bad wakeup irq %d\n", d->irq); |
279 | return -EINVAL; | 278 | return -EINVAL; |
280 | } | 279 | } |
281 | if (on) | 280 | if (on) |
@@ -294,12 +293,12 @@ static int msm_irq_set_wake(unsigned int irq, unsigned int on) | |||
294 | return 0; | 293 | return 0; |
295 | } | 294 | } |
296 | 295 | ||
297 | static int msm_irq_set_type(unsigned int irq, unsigned int flow_type) | 296 | static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type) |
298 | { | 297 | { |
299 | void __iomem *treg = VIC_INT_TO_REG_ADDR(VIC_INT_TYPE0, irq); | 298 | void __iomem *treg = VIC_INT_TO_REG_ADDR(VIC_INT_TYPE0, d->irq); |
300 | void __iomem *preg = VIC_INT_TO_REG_ADDR(VIC_INT_POLARITY0, irq); | 299 | void __iomem *preg = VIC_INT_TO_REG_ADDR(VIC_INT_POLARITY0, d->irq); |
301 | unsigned index = VIC_INT_TO_REG_INDEX(irq); | 300 | unsigned index = VIC_INT_TO_REG_INDEX(d->irq); |
302 | int b = 1 << (irq & 31); | 301 | int b = 1 << (d->irq & 31); |
303 | uint32_t polarity; | 302 | uint32_t polarity; |
304 | uint32_t type; | 303 | uint32_t type; |
305 | 304 | ||
@@ -314,11 +313,11 @@ static int msm_irq_set_type(unsigned int irq, unsigned int flow_type) | |||
314 | type = msm_irq_shadow_reg[index].int_type; | 313 | type = msm_irq_shadow_reg[index].int_type; |
315 | if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { | 314 | if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { |
316 | type |= b; | 315 | type |= b; |
317 | irq_desc[irq].handle_irq = handle_edge_irq; | 316 | irq_desc[d->irq].handle_irq = handle_edge_irq; |
318 | } | 317 | } |
319 | if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { | 318 | if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { |
320 | type &= ~b; | 319 | type &= ~b; |
321 | irq_desc[irq].handle_irq = handle_level_irq; | 320 | irq_desc[d->irq].handle_irq = handle_level_irq; |
322 | } | 321 | } |
323 | writel(type, treg); | 322 | writel(type, treg); |
324 | msm_irq_shadow_reg[index].int_type = type; | 323 | msm_irq_shadow_reg[index].int_type = type; |
@@ -326,13 +325,13 @@ static int msm_irq_set_type(unsigned int irq, unsigned int flow_type) | |||
326 | } | 325 | } |
327 | 326 | ||
328 | static struct irq_chip msm_irq_chip = { | 327 | static struct irq_chip msm_irq_chip = { |
329 | .name = "msm", | 328 | .name = "msm", |
330 | .disable = msm_irq_mask, | 329 | .irq_disable = msm_irq_mask, |
331 | .ack = msm_irq_ack, | 330 | .irq_ack = msm_irq_ack, |
332 | .mask = msm_irq_mask, | 331 | .irq_mask = msm_irq_mask, |
333 | .unmask = msm_irq_unmask, | 332 | .irq_unmask = msm_irq_unmask, |
334 | .set_wake = msm_irq_set_wake, | 333 | .irq_set_wake = msm_irq_set_wake, |
335 | .set_type = msm_irq_set_type, | 334 | .irq_set_type = msm_irq_set_type, |
336 | }; | 335 | }; |
337 | 336 | ||
338 | void __init msm_init_irq(void) | 337 | void __init msm_init_irq(void) |