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authorBrian Swetland <swetland@google.com>2007-11-26 07:11:43 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-01-26 09:39:14 -0500
commit3042102a28501510a409fe86962f20369e325cf2 (patch)
tree9d23bbddb9d8e23acf917b3eabc658edc36951e3 /arch/arm/mach-msm/io.c
parent9b73e76f3cf63379dcf45fcd4f112f5812418d0a (diff)
[ARM] msm: core platform support for ARCH_MSM7X00A
- core header files for arch-msm - Kconfig and Makefiles to enable ARCH_MSM7X00A builds - MSM7X00A specific arch_idle - peripheral iomap and irq number definitions Signed-off-by: Brian Swetland <swetland@google.com>
Diffstat (limited to 'arch/arm/mach-msm/io.c')
-rw-r--r--arch/arm/mach-msm/io.c85
1 files changed, 85 insertions, 0 deletions
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
new file mode 100644
index 000000000000..c39edb994a88
--- /dev/null
+++ b/arch/arm/mach-msm/io.c
@@ -0,0 +1,85 @@
1/* arch/arm/mach-msm/io.c
2 *
3 * MSM7K io support
4 *
5 * Copyright (C) 2007 Google, Inc.
6 * Author: Brian Swetland <swetland@google.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21
22#include <asm/hardware.h>
23#include <asm/io.h>
24#include <asm/page.h>
25#include <asm/arch/msm_iomap.h>
26#include <asm/mach/map.h>
27
28#include <asm/arch/board.h>
29
30#define MSM_DEVICE(name) { \
31 .virtual = MSM_##name##_BASE, \
32 .pfn = __phys_to_pfn(MSM_##name##_PHYS), \
33 .length = MSM_##name##_SIZE, \
34 .type = MT_DEVICE_NONSHARED, \
35 }
36
37static struct map_desc msm_io_desc[] __initdata = {
38 MSM_DEVICE(VIC),
39 MSM_DEVICE(CSR),
40 MSM_DEVICE(GPT),
41 MSM_DEVICE(DMOV),
42 MSM_DEVICE(UART1),
43 MSM_DEVICE(UART2),
44 MSM_DEVICE(UART3),
45 MSM_DEVICE(I2C),
46 MSM_DEVICE(GPIO1),
47 MSM_DEVICE(GPIO2),
48 MSM_DEVICE(HSUSB),
49 MSM_DEVICE(CLK_CTL),
50 MSM_DEVICE(PMDH),
51 MSM_DEVICE(EMDH),
52 MSM_DEVICE(MDP),
53 {
54 .virtual = MSM_SHARED_RAM_BASE,
55 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
56 .length = MSM_SHARED_RAM_SIZE,
57 .type = MT_DEVICE,
58 },
59};
60
61void __init msm_map_common_io(void)
62{
63 /* Make sure the peripheral register window is closed, since
64 * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
65 * pages are peripheral interface or not.
66 */
67 asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
68
69 iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc));
70}
71
72void __iomem *
73__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
74{
75 if (mtype == MT_DEVICE) {
76 /* The peripherals in the 88000000 - D0000000 range
77 * are only accessable by type MT_DEVICE_NONSHARED.
78 * Adjust mtype as necessary to make this "just work."
79 */
80 if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000))
81 mtype = MT_DEVICE_NONSHARED;
82 }
83
84 return __arm_ioremap(phys_addr, size, mtype);
85}