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authorStephen Boyd <sboyd@codeaurora.org>2013-07-24 16:54:28 -0400
committerDavid Brown <davidb@codeaurora.org>2013-08-06 14:17:40 -0400
commit6d07917e3f9f109477ac3ed72485f87e54132cfd (patch)
tree210f7b20818ea797fe5d6fd16b6acda9f13ea919 /arch/arm/mach-msm/include
parent0c211c29f2439e42b5c5b20c65dfde6f39aa7bbf (diff)
ARM: msm: Move debug-macro.S to include/debug
One more step to allowing MSM to participate in the multi-platform defconfig. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [davidb: Comment cleanup requested by sboyd] Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/include')
-rw-r--r--arch/arm/mach-msm/include/mach/debug-macro.S65
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8960.h5
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8x60.h5
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap.h12
-rw-r--r--arch/arm/mach-msm/include/mach/uncompress.h63
5 files changed, 0 insertions, 150 deletions
diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S
deleted file mode 100644
index 0e05f88abcd5..000000000000
--- a/arch/arm/mach-msm/include/mach/debug-macro.S
+++ /dev/null
@@ -1,65 +0,0 @@
1/*
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
5 * Author: Brian Swetland <swetland@google.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <mach/hardware.h>
19#include <mach/msm_iomap.h>
20
21 .macro addruart, rp, rv, tmp
22#ifdef MSM_DEBUG_UART_PHYS
23 ldr \rp, =MSM_DEBUG_UART_PHYS
24 ldr \rv, =MSM_DEBUG_UART_BASE
25#endif
26 .endm
27
28 .macro senduart, rd, rx
29#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
30 @ Write the 1 character to UARTDM_TF
31 str \rd, [\rx, #0x70]
32#else
33 str \rd, [\rx, #0x0C]
34#endif
35 .endm
36
37 .macro waituart, rd, rx
38#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
39 @ check for TX_EMT in UARTDM_SR
40 ldr \rd, [\rx, #0x08]
41 tst \rd, #0x08
42 bne 1002f
43 @ wait for TXREADY in UARTDM_ISR
441001: ldr \rd, [\rx, #0x14]
45 tst \rd, #0x80
46 beq 1001b
471002:
48 @ Clear TX_READY by writing to the UARTDM_CR register
49 mov \rd, #0x300
50 str \rd, [\rx, #0x10]
51 @ Write 0x1 to NCF register
52 mov \rd, #0x1
53 str \rd, [\rx, #0x40]
54 @ UARTDM reg. Read to induce delay
55 ldr \rd, [\rx, #0x08]
56#else
57 @ wait for TX_READY
581001: ldr \rd, [\rx, #0x08]
59 tst \rd, #0x04
60 beq 1001b
61#endif
62 .endm
63
64 .macro busyuart, rd, rx
65 .endm
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
index 7bca8d7108d6..396958baa6d1 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
@@ -38,9 +38,4 @@
38#define MSM8960_TMR0_PHYS 0x0208A000 38#define MSM8960_TMR0_PHYS 0x0208A000
39#define MSM8960_TMR0_SIZE SZ_4K 39#define MSM8960_TMR0_SIZE SZ_4K
40 40
41#ifdef CONFIG_DEBUG_MSM8960_UART
42#define MSM_DEBUG_UART_BASE 0xF0040000
43#define MSM_DEBUG_UART_PHYS 0x16440000
44#endif
45
46#endif 41#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 4f57b437c1b4..dede6aa23303 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -41,9 +41,4 @@
41#define MSM8X60_TMR0_PHYS 0x02040000 41#define MSM8X60_TMR0_PHYS 0x02040000
42#define MSM8X60_TMR0_SIZE SZ_4K 42#define MSM8X60_TMR0_SIZE SZ_4K
43 43
44#ifdef CONFIG_DEBUG_MSM8660_UART
45#define MSM_DEBUG_UART_BASE 0xF0040000
46#define MSM_DEBUG_UART_PHYS 0x19C40000
47#endif
48
49#endif 44#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index c56e81ffdcde..0b36c42d1f5b 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -48,18 +48,6 @@
48#include "msm_iomap-8x60.h" 48#include "msm_iomap-8x60.h"
49#include "msm_iomap-8960.h" 49#include "msm_iomap-8960.h"
50 50
51#define MSM_DEBUG_UART_SIZE SZ_4K
52#if defined(CONFIG_DEBUG_MSM_UART1)
53#define MSM_DEBUG_UART_BASE 0xE1000000
54#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
55#elif defined(CONFIG_DEBUG_MSM_UART2)
56#define MSM_DEBUG_UART_BASE 0xE1000000
57#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
58#elif defined(CONFIG_DEBUG_MSM_UART3)
59#define MSM_DEBUG_UART_BASE 0xE1000000
60#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
61#endif
62
63/* Virtual addresses shared across all MSM targets. */ 51/* Virtual addresses shared across all MSM targets. */
64#define MSM_CSR_BASE IOMEM(0xE0001000) 52#define MSM_CSR_BASE IOMEM(0xE0001000)
65#define MSM_TMR_BASE IOMEM(0xF0200000) 53#define MSM_TMR_BASE IOMEM(0xF0200000)
diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h
deleted file mode 100644
index 94324870fb04..000000000000
--- a/arch/arm/mach-msm/include/mach/uncompress.h
+++ /dev/null
@@ -1,63 +0,0 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
17#define __ASM_ARCH_MSM_UNCOMPRESS_H
18
19#include <asm/barrier.h>
20#include <asm/processor.h>
21#include <mach/msm_iomap.h>
22
23#define UART_CSR (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08))
24#define UART_TF (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x0c))
25
26#define UART_DM_SR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08)))
27#define UART_DM_CR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x10)))
28#define UART_DM_ISR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x14)))
29#define UART_DM_NCHAR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x40)))
30#define UART_DM_TF (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x70)))
31
32static void putc(int c)
33{
34#if defined(MSM_DEBUG_UART_PHYS)
35#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
36 /*
37 * Wait for TX_READY to be set; but skip it if we have a
38 * TX underrun.
39 */
40 if (!(UART_DM_SR & 0x08))
41 while (!(UART_DM_ISR & 0x80))
42 cpu_relax();
43
44 UART_DM_CR = 0x300;
45 UART_DM_NCHAR = 0x1;
46 UART_DM_TF = c;
47#else
48 while (!(UART_CSR & 0x04))
49 cpu_relax();
50 UART_TF = c;
51#endif
52#endif
53}
54
55static inline void flush(void)
56{
57}
58
59static inline void arch_decomp_setup(void)
60{
61}
62
63#endif