aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-msm/include
diff options
context:
space:
mode:
authorDavid Brown <davidb@codeaurora.org>2011-02-14 16:43:54 -0500
committerDavid Brown <davidb@codeaurora.org>2011-02-14 16:43:54 -0500
commit7358cf2073e1abcfb85bb2829f73b2a12b909de6 (patch)
tree2f912ba63d1b0156a88f7cc725e8f775412e9600 /arch/arm/mach-msm/include
parent2ff9870c4cccf97d777bf5551d22303e0176b201 (diff)
parent6499f0a8b3f44141431df79923fb8f1d8017e139 (diff)
Merge branch 'msm-core' into for-next
* msm-core: msm: iommu: Enable IOMMU support for MSM8960 msm: iommu: Generalize platform data for multiple targets msm: iommu: Create a Kconfig item for the IOMMU driver
Diffstat (limited to 'arch/arm/mach-msm/include')
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8x60.h36
1 files changed, 0 insertions, 36 deletions
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 5bd18db11aea..3b19b8f244b8 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -62,40 +62,4 @@
62#define MSM8X60_TMR0_PHYS 0x02040000 62#define MSM8X60_TMR0_PHYS 0x02040000
63#define MSM8X60_TMR0_SIZE SZ_4K 63#define MSM8X60_TMR0_SIZE SZ_4K
64 64
65#define MSM_IOMMU_JPEGD_PHYS 0x07300000
66#define MSM_IOMMU_JPEGD_SIZE SZ_1M
67
68#define MSM_IOMMU_VPE_PHYS 0x07400000
69#define MSM_IOMMU_VPE_SIZE SZ_1M
70
71#define MSM_IOMMU_MDP0_PHYS 0x07500000
72#define MSM_IOMMU_MDP0_SIZE SZ_1M
73
74#define MSM_IOMMU_MDP1_PHYS 0x07600000
75#define MSM_IOMMU_MDP1_SIZE SZ_1M
76
77#define MSM_IOMMU_ROT_PHYS 0x07700000
78#define MSM_IOMMU_ROT_SIZE SZ_1M
79
80#define MSM_IOMMU_IJPEG_PHYS 0x07800000
81#define MSM_IOMMU_IJPEG_SIZE SZ_1M
82
83#define MSM_IOMMU_VFE_PHYS 0x07900000
84#define MSM_IOMMU_VFE_SIZE SZ_1M
85
86#define MSM_IOMMU_VCODEC_A_PHYS 0x07A00000
87#define MSM_IOMMU_VCODEC_A_SIZE SZ_1M
88
89#define MSM_IOMMU_VCODEC_B_PHYS 0x07B00000
90#define MSM_IOMMU_VCODEC_B_SIZE SZ_1M
91
92#define MSM_IOMMU_GFX3D_PHYS 0x07C00000
93#define MSM_IOMMU_GFX3D_SIZE SZ_1M
94
95#define MSM_IOMMU_GFX2D0_PHYS 0x07D00000
96#define MSM_IOMMU_GFX2D0_SIZE SZ_1M
97
98#define MSM_IOMMU_GFX2D1_PHYS 0x07E00000
99#define MSM_IOMMU_GFX2D1_SIZE SZ_1M
100
101#endif 65#endif