aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-msm/include/mach
diff options
context:
space:
mode:
authorStepan Moskovchenko <stepanm@codeaurora.org>2011-02-24 21:00:41 -0500
committerDavid Brown <davidb@codeaurora.org>2011-03-08 17:40:58 -0500
commit2e8c8ba98376459e73d03a285f5d3406b630ea2d (patch)
tree774f957b4aab21d8799f9d42d761eb7b1f624ba8 /arch/arm/mach-msm/include/mach
parentb61401adf38f56dbfdac91f31425edf60595ed30 (diff)
msm: iommu: Use ASID tagging instead of VMID tagging
Use ASID tags in the TLB instead of VMID tags in preparation for changes to the secure environment. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/include/mach')
-rw-r--r--arch/arm/mach-msm/include/mach/iommu_hw-8xxx.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-msm/include/mach/iommu_hw-8xxx.h b/arch/arm/mach-msm/include/mach/iommu_hw-8xxx.h
index c2c3da9444f4..bbd397cff6c8 100644
--- a/arch/arm/mach-msm/include/mach/iommu_hw-8xxx.h
+++ b/arch/arm/mach-msm/include/mach/iommu_hw-8xxx.h
@@ -1,4 +1,4 @@
1/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. 1/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
2 * 2 *
3 * This program is free software; you can redistribute it and/or modify 3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and 4 * it under the terms of the GNU General Public License version 2 and
@@ -68,6 +68,7 @@ do { \
68#define FL_CACHEABLE (1 << 3) 68#define FL_CACHEABLE (1 << 3)
69#define FL_TEX0 (1 << 12) 69#define FL_TEX0 (1 << 12)
70#define FL_OFFSET(va) (((va) & 0xFFF00000) >> 20) 70#define FL_OFFSET(va) (((va) & 0xFFF00000) >> 20)
71#define FL_NG (1 << 17)
71 72
72/* Second-level page table bits */ 73/* Second-level page table bits */
73#define SL_BASE_MASK_LARGE 0xFFFF0000 74#define SL_BASE_MASK_LARGE 0xFFFF0000
@@ -81,6 +82,7 @@ do { \
81#define SL_CACHEABLE (1 << 3) 82#define SL_CACHEABLE (1 << 3)
82#define SL_TEX0 (1 << 6) 83#define SL_TEX0 (1 << 6)
83#define SL_OFFSET(va) (((va) & 0xFF000) >> 12) 84#define SL_OFFSET(va) (((va) & 0xFF000) >> 12)
85#define SL_NG (1 << 11)
84 86
85/* Memory type and cache policy attributes */ 87/* Memory type and cache policy attributes */
86#define MT_SO 0 88#define MT_SO 0