diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-22 12:04:39 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-22 12:04:39 -0400 |
commit | d0440c59f52d31aa7f74ba8e35cc22ee96acea84 (patch) | |
tree | 199470b64cdc30e9f0f7ecd5286ff7cc2e0a969d /arch/arm/mach-msm/include/mach/irqs-7x00.h | |
parent | 38eb1dbb0d7d190bdfe2ea824e94dab19e32737f (diff) | |
parent | c4c14f393fe4991a423c21516511ff1011140143 (diff) |
Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Olof Johansson:
"We've got a fairly large cleanup branch this time. The bulk of this
is removal of non-DT platforms of several flavors:
- Atmel at91 platforms go full-DT, with removal of remaining
board-file based support
- OMAP removes legacy board files for three more platforms
- removal of non-DT mach-msm, newer Qualcomm platforms now live in
mach-qcom
- Freescale i.MX25 also removes non-DT platform support"
Most of the rest of the changes here are fallout from the above, i.e. for
example removal of drivers that now lack platforms, etc.
* tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (58 commits)
mmc: Remove msm_sdcc driver
gpio: Remove gpio-msm-v1 driver
ARM: Remove mach-msm and associated ARM architecture code
ARM: shmobile: cpuidle: Remove the pointless default driver
ARM: davinci: dm646x: Add interrupt resource for McASPs
ARM: davinci: irqs: Correct McASP1 TX interrupt definition for DM646x
ARM: davinci: dm646x: Clean up the McASP DMA resources
ARM: davinci: devices-da8xx: Add support for McASP2 on da830
ARM: davinci: devices-da8xx: Clean up and correct the McASP device creation
ARM: davinci: devices-da8xx: Add interrupt resource to McASP structs
ARM: davinci: devices-da8xx: Add resource name for the McASP DMA request
ARM: OMAP2+: Remove legacy support for omap3 TouchBook
ARM: OMAP3: Remove legacy support for devkit8000
ARM: OMAP3: Remove legacy support for EMA-Tech Stalker board
ARM: shmobile: Consolidate the pm code for R-Car Gen2
ARM: shmobile: r8a7791: Correct SYSCIER value
ARM: shmobile: r8a7790: Correct SYSCIER value
ARM: at91: remove old setup
ARM: at91: sama5d4: remove useless map_io
ARM: at91: sama5 use SoC detection infrastructure
...
Diffstat (limited to 'arch/arm/mach-msm/include/mach/irqs-7x00.h')
-rw-r--r-- | arch/arm/mach-msm/include/mach/irqs-7x00.h | 75 |
1 files changed, 0 insertions, 75 deletions
diff --git a/arch/arm/mach-msm/include/mach/irqs-7x00.h b/arch/arm/mach-msm/include/mach/irqs-7x00.h deleted file mode 100644 index f1fe70612fe9..000000000000 --- a/arch/arm/mach-msm/include/mach/irqs-7x00.h +++ /dev/null | |||
@@ -1,75 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007 Google, Inc. | ||
3 | * Copyright (c) 2009, Code Aurora Forum. All rights reserved. | ||
4 | * Author: Brian Swetland <swetland@google.com> | ||
5 | */ | ||
6 | |||
7 | #ifndef __ASM_ARCH_MSM_IRQS_7X00_H | ||
8 | #define __ASM_ARCH_MSM_IRQS_7X00_H | ||
9 | |||
10 | /* MSM ARM11 Interrupt Numbers */ | ||
11 | /* See 80-VE113-1 A, pp219-221 */ | ||
12 | |||
13 | #define INT_A9_M2A_0 0 | ||
14 | #define INT_A9_M2A_1 1 | ||
15 | #define INT_A9_M2A_2 2 | ||
16 | #define INT_A9_M2A_3 3 | ||
17 | #define INT_A9_M2A_4 4 | ||
18 | #define INT_A9_M2A_5 5 | ||
19 | #define INT_A9_M2A_6 6 | ||
20 | #define INT_GP_TIMER_EXP 7 | ||
21 | #define INT_DEBUG_TIMER_EXP 8 | ||
22 | #define INT_UART1 9 | ||
23 | #define INT_UART2 10 | ||
24 | #define INT_UART3 11 | ||
25 | #define INT_UART1_RX 12 | ||
26 | #define INT_UART2_RX 13 | ||
27 | #define INT_UART3_RX 14 | ||
28 | #define INT_USB_OTG 15 | ||
29 | #define INT_MDDI_PRI 16 | ||
30 | #define INT_MDDI_EXT 17 | ||
31 | #define INT_MDDI_CLIENT 18 | ||
32 | #define INT_MDP 19 | ||
33 | #define INT_GRAPHICS 20 | ||
34 | #define INT_ADM_AARM 21 | ||
35 | #define INT_ADSP_A11 22 | ||
36 | #define INT_ADSP_A9_A11 23 | ||
37 | #define INT_SDC1_0 24 | ||
38 | #define INT_SDC1_1 25 | ||
39 | #define INT_SDC2_0 26 | ||
40 | #define INT_SDC2_1 27 | ||
41 | #define INT_KEYSENSE 28 | ||
42 | #define INT_TCHSCRN_SSBI 29 | ||
43 | #define INT_TCHSCRN1 30 | ||
44 | #define INT_TCHSCRN2 31 | ||
45 | |||
46 | #define INT_GPIO_GROUP1 (32 + 0) | ||
47 | #define INT_GPIO_GROUP2 (32 + 1) | ||
48 | #define INT_PWB_I2C (32 + 2) | ||
49 | #define INT_SOFTRESET (32 + 3) | ||
50 | #define INT_NAND_WR_ER_DONE (32 + 4) | ||
51 | #define INT_NAND_OP_DONE (32 + 5) | ||
52 | #define INT_PBUS_ARM11 (32 + 6) | ||
53 | #define INT_AXI_MPU_SMI (32 + 7) | ||
54 | #define INT_AXI_MPU_EBI1 (32 + 8) | ||
55 | #define INT_AD_HSSD (32 + 9) | ||
56 | #define INT_ARM11_PMU (32 + 10) | ||
57 | #define INT_ARM11_DMA (32 + 11) | ||
58 | #define INT_TSIF_IRQ (32 + 12) | ||
59 | #define INT_UART1DM_IRQ (32 + 13) | ||
60 | #define INT_UART1DM_RX (32 + 14) | ||
61 | #define INT_USB_HS (32 + 15) | ||
62 | #define INT_SDC3_0 (32 + 16) | ||
63 | #define INT_SDC3_1 (32 + 17) | ||
64 | #define INT_SDC4_0 (32 + 18) | ||
65 | #define INT_SDC4_1 (32 + 19) | ||
66 | #define INT_UART2DM_RX (32 + 20) | ||
67 | #define INT_UART2DM_IRQ (32 + 21) | ||
68 | |||
69 | /* 22-31 are reserved */ | ||
70 | |||
71 | #define NR_MSM_IRQS 64 | ||
72 | #define NR_GPIO_IRQS 122 | ||
73 | #define NR_BOARD_IRQS 64 | ||
74 | |||
75 | #endif | ||