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authorLinus Torvalds <torvalds@linux-foundation.org>2011-01-15 15:33:40 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2011-01-15 15:33:40 -0500
commit16c1020362083b320868c0deef492249089c3cd3 (patch)
treeff200df3502e6010745713275d69fd0a07e399cf /arch/arm/mach-msm/gpio.c
parent65e5d002b5ad220db2bf9557f53de5a98f7dab86 (diff)
parentbbba75606963c82febf7bd2761ea848ac5d1a1bb (diff)
Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (161 commits) ARM: pxa: fix building issue of missing physmap.h ARM: mmp: PXA910 drive strength FAST using wrong value ARM: mmp: MMP2 drive strength FAST using wrong value ARM: pxa: fix recursive calls in pxa_low_gpio_chip AT91: Support for gsia18s board AT91: Acme Systems FOX Board G20 board files AT91: board-sam9m10g45ek.c: Remove duplicate inclusion of mach/hardware.h ARM: pxa: fix suspend/resume array index miscalculation ARM: pxa: use cpu_has_ipr() consistently in irq.c ARM: pxa: remove unused variable in clock-pxa3xx.c ARM: pxa: fix warning in zeus.c ARM: sa1111: fix typo in sa1111_retrigger_lowirq() ARM mxs: clkdev related compile fixes ARM i.MX mx31_3ds: Fix MC13783 regulator names ARM: plat-stmp3xxx: irq_data conversion. ARM: plat-spear: irq_data conversion. ARM: plat-orion: irq_data conversion. ARM: plat-omap: irq_data conversion. ARM: plat-nomadik: irq_data conversion. ARM: plat-mxc: irq_data conversion. ... Fix up trivial conflict in arch/arm/plat-omap/gpio.c (Lennert Buytenhek's irq_data conversion clashing with some omap irq updates)
Diffstat (limited to 'arch/arm/mach-msm/gpio.c')
-rw-r--r--arch/arm/mach-msm/gpio.c48
1 files changed, 24 insertions, 24 deletions
diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c
index 33051b509e88..176af9dcb8ee 100644
--- a/arch/arm/mach-msm/gpio.c
+++ b/arch/arm/mach-msm/gpio.c
@@ -225,21 +225,21 @@ struct msm_gpio_chip msm_gpio_chips[] = {
225#endif 225#endif
226}; 226};
227 227
228static void msm_gpio_irq_ack(unsigned int irq) 228static void msm_gpio_irq_ack(struct irq_data *d)
229{ 229{
230 unsigned long irq_flags; 230 unsigned long irq_flags;
231 struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq); 231 struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
232 spin_lock_irqsave(&msm_chip->lock, irq_flags); 232 spin_lock_irqsave(&msm_chip->lock, irq_flags);
233 msm_gpio_clear_detect_status(msm_chip, 233 msm_gpio_clear_detect_status(msm_chip,
234 irq - gpio_to_irq(msm_chip->chip.base)); 234 d->irq - gpio_to_irq(msm_chip->chip.base));
235 spin_unlock_irqrestore(&msm_chip->lock, irq_flags); 235 spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
236} 236}
237 237
238static void msm_gpio_irq_mask(unsigned int irq) 238static void msm_gpio_irq_mask(struct irq_data *d)
239{ 239{
240 unsigned long irq_flags; 240 unsigned long irq_flags;
241 struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq); 241 struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
242 unsigned offset = irq - gpio_to_irq(msm_chip->chip.base); 242 unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
243 243
244 spin_lock_irqsave(&msm_chip->lock, irq_flags); 244 spin_lock_irqsave(&msm_chip->lock, irq_flags);
245 /* level triggered interrupts are also latched */ 245 /* level triggered interrupts are also latched */
@@ -250,11 +250,11 @@ static void msm_gpio_irq_mask(unsigned int irq)
250 spin_unlock_irqrestore(&msm_chip->lock, irq_flags); 250 spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
251} 251}
252 252
253static void msm_gpio_irq_unmask(unsigned int irq) 253static void msm_gpio_irq_unmask(struct irq_data *d)
254{ 254{
255 unsigned long irq_flags; 255 unsigned long irq_flags;
256 struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq); 256 struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
257 unsigned offset = irq - gpio_to_irq(msm_chip->chip.base); 257 unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
258 258
259 spin_lock_irqsave(&msm_chip->lock, irq_flags); 259 spin_lock_irqsave(&msm_chip->lock, irq_flags);
260 /* level triggered interrupts are also latched */ 260 /* level triggered interrupts are also latched */
@@ -265,11 +265,11 @@ static void msm_gpio_irq_unmask(unsigned int irq)
265 spin_unlock_irqrestore(&msm_chip->lock, irq_flags); 265 spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
266} 266}
267 267
268static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on) 268static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
269{ 269{
270 unsigned long irq_flags; 270 unsigned long irq_flags;
271 struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq); 271 struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
272 unsigned offset = irq - gpio_to_irq(msm_chip->chip.base); 272 unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
273 273
274 spin_lock_irqsave(&msm_chip->lock, irq_flags); 274 spin_lock_irqsave(&msm_chip->lock, irq_flags);
275 275
@@ -282,21 +282,21 @@ static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on)
282 return 0; 282 return 0;
283} 283}
284 284
285static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type) 285static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
286{ 286{
287 unsigned long irq_flags; 287 unsigned long irq_flags;
288 struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq); 288 struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
289 unsigned offset = irq - gpio_to_irq(msm_chip->chip.base); 289 unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
290 unsigned val, mask = BIT(offset); 290 unsigned val, mask = BIT(offset);
291 291
292 spin_lock_irqsave(&msm_chip->lock, irq_flags); 292 spin_lock_irqsave(&msm_chip->lock, irq_flags);
293 val = readl(msm_chip->regs.int_edge); 293 val = readl(msm_chip->regs.int_edge);
294 if (flow_type & IRQ_TYPE_EDGE_BOTH) { 294 if (flow_type & IRQ_TYPE_EDGE_BOTH) {
295 writel(val | mask, msm_chip->regs.int_edge); 295 writel(val | mask, msm_chip->regs.int_edge);
296 irq_desc[irq].handle_irq = handle_edge_irq; 296 irq_desc[d->irq].handle_irq = handle_edge_irq;
297 } else { 297 } else {
298 writel(val & ~mask, msm_chip->regs.int_edge); 298 writel(val & ~mask, msm_chip->regs.int_edge);
299 irq_desc[irq].handle_irq = handle_level_irq; 299 irq_desc[d->irq].handle_irq = handle_level_irq;
300 } 300 }
301 if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { 301 if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
302 msm_chip->both_edge_detect |= mask; 302 msm_chip->both_edge_detect |= mask;
@@ -333,16 +333,16 @@ static void msm_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
333 msm_chip->chip.base + j); 333 msm_chip->chip.base + j);
334 } 334 }
335 } 335 }
336 desc->chip->ack(irq); 336 desc->irq_data.chip->irq_ack(&desc->irq_data);
337} 337}
338 338
339static struct irq_chip msm_gpio_irq_chip = { 339static struct irq_chip msm_gpio_irq_chip = {
340 .name = "msmgpio", 340 .name = "msmgpio",
341 .ack = msm_gpio_irq_ack, 341 .irq_ack = msm_gpio_irq_ack,
342 .mask = msm_gpio_irq_mask, 342 .irq_mask = msm_gpio_irq_mask,
343 .unmask = msm_gpio_irq_unmask, 343 .irq_unmask = msm_gpio_irq_unmask,
344 .set_wake = msm_gpio_irq_set_wake, 344 .irq_set_wake = msm_gpio_irq_set_wake,
345 .set_type = msm_gpio_irq_set_type, 345 .irq_set_type = msm_gpio_irq_set_type,
346}; 346};
347 347
348static int __init msm_init_gpio(void) 348static int __init msm_init_gpio(void)