msm: generalize clock support.

The 'PCOM' method of clock control (commands issued to the radio
CPU) is shared across several (but not all) Qualcomm SOCs.
Generalize this clock mechanism so these other SOCs can be added.

Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>

1 files changed, 47 insertions, 0 deletions

diff --git a/arch/arm/mach-msm/devices-msm7x00.c b/arch/arm/mach-msm/devices-msm7x00.c
index 982f1da60160..fde9d8f69f10 100644
--- a/arch/arm/mach-msm/devices-msm7x00.c
+++ b/arch/arm/mach-msm/devices-msm7x00.c
@@ -24,6 +24,8 @@
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 
+
+#include "clock.h"
 #include <mach/mmc.h>
 
 static struct resource resources_uart1[] = {
@@ -344,3 +346,48 @@ int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat,
         return platform_device_register(pdev);
 }
 
+struct clk msm_clocks_7x01a[] = {
+        CLK_PCOM("adm_clk",     ADM_CLK,        NULL, 0),
+        CLK_PCOM("adsp_clk",    ADSP_CLK,       NULL, 0),
+        CLK_PCOM("ebi1_clk",    EBI1_CLK,       NULL, 0),
+        CLK_PCOM("ebi2_clk",    EBI2_CLK,       NULL, 0),
+        CLK_PCOM("ecodec_clk",  ECODEC_CLK,     NULL, 0),
+        CLK_PCOM("emdh_clk",    EMDH_CLK,       NULL, OFF),
+        CLK_PCOM("gp_clk",              GP_CLK,         NULL, 0),
+        CLK_PCOM("grp_clk",     GRP_3D_CLK,     NULL, OFF),
+        CLK_PCOM("i2c_clk",     I2C_CLK,        &msm_device_i2c.dev, 0),
+        CLK_PCOM("icodec_rx_clk",       ICODEC_RX_CLK,  NULL, 0),
+        CLK_PCOM("icodec_tx_clk",       ICODEC_TX_CLK,  NULL, 0),
+        CLK_PCOM("imem_clk",    IMEM_CLK,       NULL, OFF),
+        CLK_PCOM("mdc_clk",     MDC_CLK,        NULL, 0),
+        CLK_PCOM("mdp_clk",     MDP_CLK,        NULL, OFF),
+        CLK_PCOM("pbus_clk",    PBUS_CLK,       NULL, 0),
+        CLK_PCOM("pcm_clk",     PCM_CLK,        NULL, 0),
+        CLK_PCOM("pmdh_clk",    PMDH_CLK,       NULL, OFF ),
+        CLK_PCOM("sdac_clk",    SDAC_CLK,       NULL, OFF),
+        CLK_PCOM("sdc_clk",     SDC1_CLK,       &msm_device_sdc1.dev, OFF),
+        CLK_PCOM("sdc_pclk",    SDC1_P_CLK,     &msm_device_sdc1.dev, OFF),
+        CLK_PCOM("sdc_clk",     SDC2_CLK,       &msm_device_sdc2.dev, OFF),
+        CLK_PCOM("sdc_pclk",    SDC2_P_CLK,     &msm_device_sdc2.dev, OFF),
+        CLK_PCOM("sdc_clk",     SDC3_CLK,       &msm_device_sdc3.dev, OFF),
+        CLK_PCOM("sdc_pclk",    SDC3_P_CLK,     &msm_device_sdc3.dev, OFF),
+        CLK_PCOM("sdc_clk",     SDC4_CLK,       &msm_device_sdc4.dev, OFF),
+        CLK_PCOM("sdc_pclk",    SDC4_P_CLK,     &msm_device_sdc4.dev, OFF),
+        CLK_PCOM("tsif_clk",    TSIF_CLK,       NULL, 0),
+        CLK_PCOM("tsif_ref_clk",        TSIF_REF_CLK,   NULL, 0),
+        CLK_PCOM("tv_dac_clk",  TV_DAC_CLK,     NULL, 0),
+        CLK_PCOM("tv_enc_clk",  TV_ENC_CLK,     NULL, 0),
+        CLK_PCOM("uart_clk",    UART1_CLK,      &msm_device_uart1.dev, OFF),
+        CLK_PCOM("uart_clk",    UART2_CLK,      &msm_device_uart2.dev, 0),
+        CLK_PCOM("uart_clk",    UART3_CLK,      &msm_device_uart3.dev, OFF),
+        CLK_PCOM("uart1dm_clk", UART1DM_CLK,    NULL, OFF),
+        CLK_PCOM("uart2dm_clk", UART2DM_CLK,    NULL, 0),
+        CLK_PCOM("usb_hs_clk",  USB_HS_CLK,     &msm_device_hsusb.dev, OFF),
+        CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK,   &msm_device_hsusb.dev, OFF),
+        CLK_PCOM("usb_otg_clk", USB_OTG_CLK,    NULL, 0),
+        CLK_PCOM("vdc_clk",     VDC_CLK,        NULL, OFF ),
+        CLK_PCOM("vfe_clk",     VFE_CLK,        NULL, OFF),
+        CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK,    NULL, OFF),
+};
+
+unsigned msm_num_clocks_7x01a = ARRAY_SIZE(msm_clocks_7x01a);