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authorDaniel Walker <dwalker@codeaurora.org>2010-05-12 16:43:28 -0400
committerDaniel Walker <dwalker@codeaurora.org>2010-05-13 19:08:20 -0400
commit5e96da5d5074eae3b94d4abadfc114febb6e2a51 (patch)
tree4278052c5aaa63ae7af02fac8635c257139f3d6b /arch/arm/mach-msm/clock-pcom.c
parentec4d79255c684a74ade2f2394b9f9a669cee0036 (diff)
msm: generalize clock support.
The 'PCOM' method of clock control (commands issued to the radio CPU) is shared across several (but not all) Qualcomm SOCs. Generalize this clock mechanism so these other SOCs can be added. Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/clock-pcom.c')
-rw-r--r--arch/arm/mach-msm/clock-pcom.c131
1 files changed, 131 insertions, 0 deletions
diff --git a/arch/arm/mach-msm/clock-pcom.c b/arch/arm/mach-msm/clock-pcom.c
new file mode 100644
index 000000000000..a3b45627eb4a
--- /dev/null
+++ b/arch/arm/mach-msm/clock-pcom.c
@@ -0,0 +1,131 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2007-2010, Code Aurora Forum. All rights reserved.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/err.h>
17#include <linux/ctype.h>
18#include <linux/stddef.h>
19#include <mach/clk.h>
20
21#include "proc_comm.h"
22#include "clock.h"
23
24/*
25 * glue for the proc_comm interface
26 */
27int pc_clk_enable(unsigned id)
28{
29 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_ENABLE, &id, NULL);
30 if (rc < 0)
31 return rc;
32 else
33 return (int)id < 0 ? -EINVAL : 0;
34}
35
36void pc_clk_disable(unsigned id)
37{
38 msm_proc_comm(PCOM_CLKCTL_RPC_DISABLE, &id, NULL);
39}
40
41int pc_clk_reset(unsigned id, enum clk_reset_action action)
42{
43 int rc;
44
45 if (action == CLK_RESET_ASSERT)
46 rc = msm_proc_comm(PCOM_CLKCTL_RPC_RESET_ASSERT, &id, NULL);
47 else
48 rc = msm_proc_comm(PCOM_CLKCTL_RPC_RESET_DEASSERT, &id, NULL);
49
50 if (rc < 0)
51 return rc;
52 else
53 return (int)id < 0 ? -EINVAL : 0;
54}
55
56int pc_clk_set_rate(unsigned id, unsigned rate)
57{
58 /* The rate _might_ be rounded off to the nearest KHz value by the
59 * remote function. So a return value of 0 doesn't necessarily mean
60 * that the exact rate was set successfully.
61 */
62 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_SET_RATE, &id, &rate);
63 if (rc < 0)
64 return rc;
65 else
66 return (int)id < 0 ? -EINVAL : 0;
67}
68
69int pc_clk_set_min_rate(unsigned id, unsigned rate)
70{
71 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_MIN_RATE, &id, &rate);
72 if (rc < 0)
73 return rc;
74 else
75 return (int)id < 0 ? -EINVAL : 0;
76}
77
78int pc_clk_set_max_rate(unsigned id, unsigned rate)
79{
80 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_MAX_RATE, &id, &rate);
81 if (rc < 0)
82 return rc;
83 else
84 return (int)id < 0 ? -EINVAL : 0;
85}
86
87int pc_clk_set_flags(unsigned id, unsigned flags)
88{
89 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_SET_FLAGS, &id, &flags);
90 if (rc < 0)
91 return rc;
92 else
93 return (int)id < 0 ? -EINVAL : 0;
94}
95
96unsigned pc_clk_get_rate(unsigned id)
97{
98 if (msm_proc_comm(PCOM_CLKCTL_RPC_RATE, &id, NULL))
99 return 0;
100 else
101 return id;
102}
103
104unsigned pc_clk_is_enabled(unsigned id)
105{
106 if (msm_proc_comm(PCOM_CLKCTL_RPC_ENABLED, &id, NULL))
107 return 0;
108 else
109 return id;
110}
111
112long pc_clk_round_rate(unsigned id, unsigned rate)
113{
114
115 /* Not really supported; pc_clk_set_rate() does rounding on it's own. */
116 return rate;
117}
118
119struct clk_ops clk_ops_pcom = {
120 .enable = pc_clk_enable,
121 .disable = pc_clk_disable,
122 .auto_off = pc_clk_disable,
123 .reset = pc_clk_reset,
124 .set_rate = pc_clk_set_rate,
125 .set_min_rate = pc_clk_set_min_rate,
126 .set_max_rate = pc_clk_set_max_rate,
127 .set_flags = pc_clk_set_flags,
128 .get_rate = pc_clk_get_rate,
129 .is_enabled = pc_clk_is_enabled,
130 .round_rate = pc_clk_round_rate,
131};