msm: 8x50: Add initial support for SDCC

Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>

1 files changed, 80 insertions, 1 deletions

diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
index 2e8391307f55..12863f791434 100644
--- a/arch/arm/mach-msm/board-qsd8x50.c
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -21,6 +21,7 @@
 #include <linux/platform_device.h>
 #include <linux/delay.h>
 #include <linux/usb/msm_hsusb.h>
+#include <linux/err.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -31,6 +32,8 @@
 #include <mach/irqs.h>
 #include <mach/sirc.h>
 #include <mach/gpio.h>
+#include <mach/vreg.h>
+#include <mach/mmc.h>
 
 #include "devices.h"
 
@@ -95,6 +98,81 @@ static struct platform_device *devices[] __initdata = {
         &msm_device_hsusb_host,
 };
 
+static struct msm_mmc_gpio sdc1_gpio_cfg[] = {
+        {51, "sdc1_dat_3"},
+        {52, "sdc1_dat_2"},
+        {53, "sdc1_dat_1"},
+        {54, "sdc1_dat_0"},
+        {55, "sdc1_cmd"},
+        {56, "sdc1_clk"}
+};
+
+static struct vreg *vreg_mmc;
+static unsigned long vreg_sts;
+
+static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
+{
+        int rc = 0;
+        struct platform_device *pdev;
+
+        pdev = container_of(dv, struct platform_device, dev);
+
+        if (vdd == 0) {
+                if (!vreg_sts)
+                        return 0;
+
+                clear_bit(pdev->id, &vreg_sts);
+
+                if (!vreg_sts) {
+                        rc = vreg_disable(vreg_mmc);
+                        if (rc)
+                                pr_err("vreg_mmc disable failed for slot "
+                                                "%d: %d\n", pdev->id, rc);
+                }
+                return 0;
+        }
+
+        if (!vreg_sts) {
+                rc = vreg_set_level(vreg_mmc, 2900);
+                if (rc)
+                        pr_err("vreg_mmc set level failed for slot %d: %d\n",
+                                        pdev->id, rc);
+                rc = vreg_enable(vreg_mmc);
+                if (rc)
+                        pr_err("vreg_mmc enable failed for slot %d: %d\n",
+                                        pdev->id, rc);
+        }
+        set_bit(pdev->id, &vreg_sts);
+        return 0;
+}
+
+static struct msm_mmc_gpio_data sdc1_gpio = {
+        .gpio = sdc1_gpio_cfg,
+        .size = ARRAY_SIZE(sdc1_gpio_cfg),
+};
+
+static struct msm_mmc_platform_data qsd8x50_sdc1_data = {
+        .ocr_mask       = MMC_VDD_27_28 | MMC_VDD_28_29,
+        .translate_vdd  = msm_sdcc_setup_power,
+        .gpio_data = &sdc1_gpio,
+};
+
+static void __init qsd8x50_init_mmc(void)
+{
+        if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa())
+                vreg_mmc = vreg_get(NULL, "gp6");
+        else
+                vreg_mmc = vreg_get(NULL, "gp5");
+
+        if (IS_ERR(vreg_mmc)) {
+                pr_err("vreg get for vreg_mmc failed (%ld)\n",
+                                PTR_ERR(vreg_mmc));
+                return;
+        }
+
+        msm_add_sdcc(1, &qsd8x50_sdc1_data, 0, 0);
+}
+
 static void __init qsd8x50_map_io(void)
 {
         msm_map_qsd8x50_io();
@@ -113,6 +191,7 @@ static void __init qsd8x50_init(void)
         msm_device_hsusb.dev.parent = &msm_device_otg.dev;
         msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
         platform_add_devices(devices, ARRAY_SIZE(devices));
+        qsd8x50_init_mmc();
 }
 
 MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")