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authorLinus Torvalds <torvalds@linux-foundation.org>2010-10-21 19:42:32 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-10-21 19:42:32 -0400
commitb5153163ed580e00c67bdfecb02b2e3843817b3e (patch)
treeb8c878601f07f5df8f694435857a5f3dcfd75482 /arch/arm/mach-msm/board-msm8x60.c
parenta8cbf22559ceefdcdfac00701e8e6da7518b7e8e (diff)
parent6451d7783ba5ff24eb1a544eaa6665b890f30466 (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (278 commits) arm: remove machine_desc.io_pg_offst and .phys_io arm: use addruart macro to establish debug mappings arm: return both physical and virtual addresses from addruart arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCC ARM: make struct machine_desc definition coherent with its comment eukrea_mbimxsd-baseboard: Pass the correct GPIO to gpio_free cpuimx27: fix compile when ULPI is selected mach-pcm037_eet: fix compile errors Fixing ethernet driver compilation error for i.MX31 ADS board cpuimx51: update board support mx5: add cpuimx51sd module and its baseboard iomux-mx51: fix GPIO_1_xx 's IOMUX configuration imx-esdhc: update devices registration mx51: add resources for SD/MMC on i.MX51 iomux-mx51: fix SD1 and SD2's iomux configuration clock-mx51: rename CLOCK1 to CLOCK_CCGR for better readability clock-mx51: factorize clk_set_parent and clk_get_rate eukrea_mbimxsd: add support for DVI displays cpuimx25 & cpuimx35: fix OTG port registration in host mode i.MX31 and i.MX35 : fix errate TLSbo65953 and ENGcm09472 ...
Diffstat (limited to 'arch/arm/mach-msm/board-msm8x60.c')
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c100
1 files changed, 100 insertions, 0 deletions
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
new file mode 100644
index 000000000000..7486a681cc71
--- /dev/null
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -0,0 +1,100 @@
1/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15 * 02110-1301, USA.
16 *
17 */
18
19#include <linux/kernel.h>
20#include <linux/platform_device.h>
21#include <linux/io.h>
22#include <linux/irq.h>
23
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26#include <asm/hardware/gic.h>
27
28#include <mach/board.h>
29#include <mach/msm_iomap.h>
30
31void __iomem *gic_cpu_base_addr;
32
33unsigned long clk_get_max_axi_khz(void)
34{
35 return 0;
36}
37
38static void __init msm8x60_map_io(void)
39{
40 msm_map_msm8x60_io();
41}
42
43static void __init msm8x60_init_irq(void)
44{
45 unsigned int i;
46
47 gic_dist_init(0, MSM_QGIC_DIST_BASE, GIC_PPI_START);
48 gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE;
49 gic_cpu_init(0, MSM_QGIC_CPU_BASE);
50
51 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
52 writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
53
54 /* RUMI does not adhere to GIC spec by enabling STIs by default.
55 * Enable/clear is supposed to be RO for STIs, but is RW on RUMI.
56 */
57 if (!machine_is_msm8x60_sim())
58 writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
59
60 /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
61 * as they are configured as level, which does not play nice with
62 * handle_percpu_irq.
63 */
64 for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
65 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
66 set_irq_handler(i, handle_percpu_irq);
67 }
68}
69
70static void __init msm8x60_init(void)
71{
72}
73
74MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
75 .map_io = msm8x60_map_io,
76 .init_irq = msm8x60_init_irq,
77 .init_machine = msm8x60_init,
78 .timer = &msm_timer,
79MACHINE_END
80
81MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
82 .map_io = msm8x60_map_io,
83 .init_irq = msm8x60_init_irq,
84 .init_machine = msm8x60_init,
85 .timer = &msm_timer,
86MACHINE_END
87
88MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
89 .map_io = msm8x60_map_io,
90 .init_irq = msm8x60_init_irq,
91 .init_machine = msm8x60_init,
92 .timer = &msm_timer,
93MACHINE_END
94
95MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
96 .map_io = msm8x60_map_io,
97 .init_irq = msm8x60_init_irq,
98 .init_machine = msm8x60_init,
99 .timer = &msm_timer,
100MACHINE_END