diff options
author | Haojian Zhuang <haojian.zhuang@marvell.com> | 2010-02-03 10:01:18 -0500 |
---|---|---|
committer | Eric Miao <eric.y.miao@gmail.com> | 2010-03-01 18:40:57 -0500 |
commit | df0c382436df5bdd74030baafa294b75c231ec8c (patch) | |
tree | dbcf772218fcc1dde83ebb08395f1d1fa6326e51 /arch/arm/mach-mmp | |
parent | ce0ac4235972cc2533e4e2095396208b59117c57 (diff) |
[ARM] mmp2: add handling on PMIC IRQ
Since PMIC INT pin is a special pin of CPU, the status of PMIC INT pin needs
to be cleared after PMIC IRQ occured. Now append the clear operation in
irq chip handler.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-mmp')
-rw-r--r-- | arch/arm/mach-mmp/common.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-mmp/irq-mmp2.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-mmp/mmp2.c | 10 |
3 files changed, 22 insertions, 1 deletions
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h index 18c037f8bb0a..b4a0ba05a0f4 100644 --- a/arch/arm/mach-mmp/common.h +++ b/arch/arm/mach-mmp/common.h | |||
@@ -3,6 +3,7 @@ | |||
3 | struct sys_timer; | 3 | struct sys_timer; |
4 | 4 | ||
5 | extern void timer_init(int irq); | 5 | extern void timer_init(int irq); |
6 | extern void mmp2_clear_pmic_int(void); | ||
6 | 7 | ||
7 | extern struct sys_timer pxa168_timer; | 8 | extern struct sys_timer pxa168_timer; |
8 | extern struct sys_timer pxa910_timer; | 9 | extern struct sys_timer pxa910_timer; |
diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c index 3ae1c543707c..b187c027822d 100644 --- a/arch/arm/mach-mmp/irq-mmp2.c +++ b/arch/arm/mach-mmp/irq-mmp2.c | |||
@@ -42,6 +42,12 @@ static struct irq_chip icu_irq_chip = { | |||
42 | .unmask = icu_unmask_irq, | 42 | .unmask = icu_unmask_irq, |
43 | }; | 43 | }; |
44 | 44 | ||
45 | static void pmic_irq_ack(unsigned int irq) | ||
46 | { | ||
47 | if (irq == IRQ_MMP2_PMIC) | ||
48 | mmp2_clear_pmic_int(); | ||
49 | } | ||
50 | |||
45 | #define SECOND_IRQ_MASK(_name_, irq_base, prefix) \ | 51 | #define SECOND_IRQ_MASK(_name_, irq_base, prefix) \ |
46 | static void _name_##_mask_irq(unsigned int irq) \ | 52 | static void _name_##_mask_irq(unsigned int irq) \ |
47 | { \ | 53 | { \ |
@@ -82,7 +88,6 @@ SECOND_IRQ_DEMUX(_name_, irq_base, prefix) \ | |||
82 | static struct irq_chip _name_##_irq_chip = { \ | 88 | static struct irq_chip _name_##_irq_chip = { \ |
83 | .name = #_name_, \ | 89 | .name = #_name_, \ |
84 | .mask = _name_##_mask_irq, \ | 90 | .mask = _name_##_mask_irq, \ |
85 | .mask_ack = _name_##_mask_irq, \ | ||
86 | .unmask = _name_##_unmask_irq, \ | 91 | .unmask = _name_##_unmask_irq, \ |
87 | } | 92 | } |
88 | 93 | ||
@@ -126,6 +131,11 @@ void __init mmp2_init_icu(void) | |||
126 | } | 131 | } |
127 | } | 132 | } |
128 | 133 | ||
134 | /* NOTE: IRQ_MMP2_PMIC requires the PMIC MFPR register | ||
135 | * to be written to clear the interrupt | ||
136 | */ | ||
137 | pmic_irq_chip.ack = pmic_irq_ack; | ||
138 | |||
129 | init_mux_irq(&pmic_irq_chip, IRQ_MMP2_PMIC_BASE, 2); | 139 | init_mux_irq(&pmic_irq_chip, IRQ_MMP2_PMIC_BASE, 2); |
130 | init_mux_irq(&rtc_irq_chip, IRQ_MMP2_RTC_BASE, 2); | 140 | init_mux_irq(&rtc_irq_chip, IRQ_MMP2_RTC_BASE, 2); |
131 | init_mux_irq(&twsi_irq_chip, IRQ_MMP2_TWSI_BASE, 5); | 141 | init_mux_irq(&twsi_irq_chip, IRQ_MMP2_TWSI_BASE, 5); |
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c index 0f1c441cc898..72eb9daeea99 100644 --- a/arch/arm/mach-mmp/mmp2.c +++ b/arch/arm/mach-mmp/mmp2.c | |||
@@ -37,6 +37,16 @@ static struct mfp_addr_map mmp2_addr_map[] __initdata = { | |||
37 | MFP_ADDR_END, | 37 | MFP_ADDR_END, |
38 | }; | 38 | }; |
39 | 39 | ||
40 | void mmp2_clear_pmic_int(void) | ||
41 | { | ||
42 | unsigned long mfpr_pmic, data; | ||
43 | |||
44 | mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4; | ||
45 | data = __raw_readl(mfpr_pmic); | ||
46 | __raw_writel(data | (1 << 6), mfpr_pmic); | ||
47 | __raw_writel(data, mfpr_pmic); | ||
48 | } | ||
49 | |||
40 | static void __init mmp2_init_gpio(void) | 50 | static void __init mmp2_init_gpio(void) |
41 | { | 51 | { |
42 | int i; | 52 | int i; |