Merge branch 'next/fixes' of git://git.linaro.org/people/arnd/arm-soc

* 'next/fixes' of git://git.linaro.org/people/arnd/arm-soc: (28 commits)
  ARM: pxa/cm-x300: properly set bt_reset pin
  ARM: mmp: rename SHEEVAD to GPLUGD
  ARM: imx: Fix typo 'MACH_MX31_3DS_MXC_NAND_USE_BBT'
  ARM: i.MX28: shift frac value in _CLK_SET_RATE
  plat-mxc: iomux-v3.h: implicitly enable pull-up/down when that's desired
  ARM: mx5: fix clock usage for suspend
  ARM: pxa: use correct __iomem annotations
  ARM: pxa: sharpsl pm needs SPI
  ARM: pxa: centro and treo680 need palm27x
  ARM: pxa: make pxafb_smart_*() empty when not enabled
  ARM: pxa: select POWER_SUPPLY on raumfeld
  ARM: pxa: pxa95x is incompatible with earlier pxa
  ARM: pxa: CPU_FREQ_TABLE is needed for CPU_FREQ
  ARM: pxa: pxa95x/saarb depends on pxa3xx code
  ARM: pxa: allow selecting just one of TREO680/CENTRO
  ARM: pxa: export symbols from pxa3xx-ulpi
  ARM: pxa: make zylonite_pxa*_init declaration match code
  ARM: pxa/z2: fix building error of pxa27x_cpu_suspend() no longer available
  ARM: at91: add defconfig for at91sam9g45 family
  ARM: at91: remove dependency for Atmel PWM driver selector in Kconfig
  ...

8 files changed, 20 insertions, 13 deletions

diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index 56ef5f6c8116..323d4c9e9f44 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -77,7 +77,7 @@ config MACH_TETON_BGA
           Say 'Y' here if you want to support the Marvell PXA168-based
           Teton BGA Development Board.
 
-config MACH_SHEEVAD
+config MACH_GPLUGD
         bool "Marvell's PXA168 GuruPlug Display (gplugD) Board"
         select CPU_PXA168
         help
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index b0ac942327aa..8f948f981646 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -19,4 +19,4 @@ obj-$(CONFIG_MACH_BROWNSTONE)	+= brownstone.o
 obj-$(CONFIG_MACH_FLINT)        += flint.o
 obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
 obj-$(CONFIG_MACH_TETON_BGA)    += teton_bga.o
-obj-$(CONFIG_MACH_SHEEVAD)      += gplugd.o
+obj-$(CONFIG_MACH_GPLUGD)       += gplugd.o
diff --git a/arch/arm/mach-mmp/clock.h b/arch/arm/mach-mmp/clock.h
index 3143e994e672..149b30cd1469 100644
--- a/arch/arm/mach-mmp/clock.h
+++ b/arch/arm/mach-mmp/clock.h
@@ -30,7 +30,7 @@ extern struct clkops apmu_clk_ops;
 
 #define APBC_CLK(_name, _reg, _fnclksel, _rate)                 \
 struct clk clk_##_name = {                                      \
-                .clk_rst        = (void __iomem *)APBC_##_reg,  \
+                .clk_rst        = APBC_##_reg,                  \
                 .fnclksel       = _fnclksel,                    \
                 .rate           = _rate,                        \
                 .ops            = &apbc_clk_ops,                \
@@ -38,7 +38,7 @@ struct clk clk_##_name = {					\
 
 #define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops)       \
 struct clk clk_##_name = {                                      \
-                .clk_rst        = (void __iomem *)APBC_##_reg,  \
+                .clk_rst        = APBC_##_reg,                  \
                 .fnclksel       = _fnclksel,                    \
                 .rate           = _rate,                        \
                 .ops            = _ops,                         \
@@ -46,7 +46,7 @@ struct clk clk_##_name = {					\
 
 #define APMU_CLK(_name, _reg, _eval, _rate)                     \
 struct clk clk_##_name = {                                      \
-                .clk_rst        = (void __iomem *)APMU_##_reg,  \
+                .clk_rst        = APMU_##_reg,                  \
                 .enable_val     = _eval,                        \
                 .rate           = _rate,                        \
                 .ops            = &apmu_clk_ops,                \
@@ -54,7 +54,7 @@ struct clk clk_##_name = {					\
 
 #define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops)           \
 struct clk clk_##_name = {                                      \
-                .clk_rst        = (void __iomem *)APMU_##_reg,  \
+                .clk_rst        = APMU_##_reg,                  \
                 .enable_val     = _eval,                        \
                 .rate           = _rate,                        \
                 .ops            = _ops,                         \
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c
index 0ec0ca80bb3e..5720674739f0 100644
--- a/arch/arm/mach-mmp/common.c
+++ b/arch/arm/mach-mmp/common.c
@@ -27,12 +27,12 @@ EXPORT_SYMBOL(mmp_chip_id);
 static struct map_desc standard_io_desc[] __initdata = {
         {
                 .pfn            = __phys_to_pfn(APB_PHYS_BASE),
-                .virtual        = APB_VIRT_BASE,
+                .virtual        = (unsigned long)APB_VIRT_BASE,
                 .length         = APB_PHYS_SIZE,
                 .type           = MT_DEVICE,
         }, {
                 .pfn            = __phys_to_pfn(AXI_PHYS_BASE),
-                .virtual        = AXI_VIRT_BASE,
+                .virtual        = (unsigned long)AXI_VIRT_BASE,
                 .length         = AXI_PHYS_SIZE,
                 .type           = MT_DEVICE,
         },
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 32776f3739f1..69156568bc41 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -188,7 +188,7 @@ static void __init gplugd_init(void)
         pxa168_add_eth(&gplugd_eth_platform_data);
 }
 
-MACHINE_START(SHEEVAD, "PXA168-based GuruPlug Display (gplugD) Platform")
+MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
         .map_io         = mmp_map_io,
         .nr_irqs        = IRQ_BOARD_START,
         .init_irq       = pxa168_init_irq,
diff --git a/arch/arm/mach-mmp/include/mach/addr-map.h b/arch/arm/mach-mmp/include/mach/addr-map.h
index 3254089a644d..3e404acd6ff4 100644
--- a/arch/arm/mach-mmp/include/mach/addr-map.h
+++ b/arch/arm/mach-mmp/include/mach/addr-map.h
@@ -11,6 +11,12 @@
 #ifndef __ASM_MACH_ADDR_MAP_H
 #define __ASM_MACH_ADDR_MAP_H
 
+#ifndef __ASSEMBLER__
+#define IOMEM(x)        ((void __iomem *)(x))
+#else
+#define IOMEM(x)        (x)
+#endif
+
 /* APB - Application Subsystem Peripheral Bus
  *
  * NOTE: the DMA controller registers are actually on the AXI fabric #1
@@ -18,11 +24,11 @@
  * peripherals on APB, let's count it into the ABP mapping area.
  */
 #define APB_PHYS_BASE           0xd4000000
-#define APB_VIRT_BASE           0xfe000000
+#define APB_VIRT_BASE           IOMEM(0xfe000000)
 #define APB_PHYS_SIZE           0x00200000
 
 #define AXI_PHYS_BASE           0xd4200000
-#define AXI_VIRT_BASE           0xfe200000
+#define AXI_VIRT_BASE           IOMEM(0xfe200000)
 #define AXI_PHYS_SIZE           0x00200000
 
 /* Static Memory Controller - Chip Select 0 and 1 */
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
index c017a983eced..d14eeaf16322 100644
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
@@ -7,7 +7,7 @@
 #define GPIO_REGS_VIRT  (APB_VIRT_BASE + 0x19000)
 
 #define BANK_OFF(n)     (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
-#define GPIO_REG(x)     (*((volatile u32 *)(GPIO_REGS_VIRT + (x))))
+#define GPIO_REG(x)     (GPIO_REGS_VIRT + (x))
 
 #define NR_BUILTIN_GPIO         IRQ_GPIO_NUM
 
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 65d8689e40c9..7a7e8e4dde41 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -86,7 +86,8 @@ static struct mfp_addr_map mmp2_addr_map[] __initdata = {
 
 void mmp2_clear_pmic_int(void)
 {
-        unsigned long mfpr_pmic, data;
+        void __iomem *mfpr_pmic;
+        unsigned long data;
 
         mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4;
         data = __raw_readl(mfpr_pmic);