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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-01-06 17:33:32 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-01-06 17:33:32 -0500
commit404a02cbd2ae8bf256a2fa1169bdfe86bb5ebb34 (patch)
tree99119edc53fdca73ed7586829b8ee736e09440b3 /arch/arm/mach-mmp
parent28cdac6690cb113856293bf79b40de33dbd8f974 (diff)
parent1051b9f0f9eab8091fe3bf98320741adf36b4cfa (diff)
Merge branch 'devel-stable' into devel
Conflicts: arch/arm/mach-pxa/clock.c arch/arm/mach-pxa/clock.h
Diffstat (limited to 'arch/arm/mach-mmp')
-rw-r--r--arch/arm/mach-mmp/Kconfig22
-rw-r--r--arch/arm/mach-mmp/Makefile1
-rw-r--r--arch/arm/mach-mmp/brownstone.c204
-rw-r--r--arch/arm/mach-mmp/flint.c2
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-mmp2.h338
-rw-r--r--arch/arm/mach-mmp/include/mach/mmp2.h22
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apmu.h2
-rw-r--r--arch/arm/mach-mmp/jasper.c35
-rw-r--r--arch/arm/mach-mmp/mmp2.c35
-rw-r--r--arch/arm/mach-mmp/pxa910.c2
10 files changed, 488 insertions, 175 deletions
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index 0711d3b620ad..67793a690272 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -37,25 +37,38 @@ config MACH_TTC_DKB
37 Say 'Y' here if you want to support the Marvell PXA910-based 37 Say 'Y' here if you want to support the Marvell PXA910-based
38 TTC_DKB Development Board. 38 TTC_DKB Development Board.
39 39
40config MACH_BROWNSTONE
41 bool "Marvell's Brownstone Development Platform"
42 depends on !CPU_MOHAWK
43 select CPU_MMP2
44 help
45 Say 'Y' here if you want to support the Marvell MMP2-based
46 Brown Development Platform.
47 MMP2-based board can't be co-existed with PXA168-based &
48 PXA910-based development board. Since MMP2 is compatible to
49 ARMv7 architecture.
50
40config MACH_FLINT 51config MACH_FLINT
41 bool "Marvell's Flint Development Platform" 52 bool "Marvell's Flint Development Platform"
53 depends on !CPU_MOHAWK
42 select CPU_MMP2 54 select CPU_MMP2
43 help 55 help
44 Say 'Y' here if you want to support the Marvell MMP2-based 56 Say 'Y' here if you want to support the Marvell MMP2-based
45 Flint Development Platform. 57 Flint Development Platform.
46 MMP2-based board can't be co-existed with PXA168-based & 58 MMP2-based board can't be co-existed with PXA168-based &
47 PXA910-based development board. Since MMP2 is compatible to 59 PXA910-based development board. Since MMP2 is compatible to
48 ARMv6 architecture. 60 ARMv7 architecture.
49 61
50config MACH_MARVELL_JASPER 62config MACH_MARVELL_JASPER
51 bool "Marvell's Jasper Development Platform" 63 bool "Marvell's Jasper Development Platform"
64 depends on !CPU_MOHAWK
52 select CPU_MMP2 65 select CPU_MMP2
53 help 66 help
54 Say 'Y' here if you want to support the Marvell MMP2-base 67 Say 'Y' here if you want to support the Marvell MMP2-base
55 Jasper Development Platform. 68 Jasper Development Platform.
56 MMP2-based board can't be co-existed with PXA168-based & 69 MMP2-based board can't be co-existed with PXA168-based &
57 PXA910-based development board. Since MMP2 is compatible to 70 PXA910-based development board. Since MMP2 is compatible to
58 ARMv6 architecture. 71 ARMv7 architecture.
59 72
60config MACH_TETON_BGA 73config MACH_TETON_BGA
61 bool "Marvell's PXA168 Teton BGA Development Board" 74 bool "Marvell's PXA168 Teton BGA Development Board"
@@ -80,8 +93,7 @@ config CPU_PXA910
80 93
81config CPU_MMP2 94config CPU_MMP2
82 bool 95 bool
83 select CPU_V6 96 select CPU_PJ4
84 select CPU_32v6K
85 help 97 help
86 Select code specific to MMP2. MMP2 is ARMv6 compatible. 98 Select code specific to MMP2. MMP2 is ARMv7 compatible.
87endif 99endif
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 751cdbf733c8..5c68382141af 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_MACH_ZYLONITE2) += aspenite.o
15obj-$(CONFIG_MACH_AVENGERS_LITE)+= avengers_lite.o 15obj-$(CONFIG_MACH_AVENGERS_LITE)+= avengers_lite.o
16obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o 16obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o
17obj-$(CONFIG_MACH_TTC_DKB) += ttc_dkb.o 17obj-$(CONFIG_MACH_TTC_DKB) += ttc_dkb.o
18obj-$(CONFIG_MACH_BROWNSTONE) += brownstone.o
18obj-$(CONFIG_MACH_FLINT) += flint.o 19obj-$(CONFIG_MACH_FLINT) += flint.o
19obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o 20obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
20obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o 21obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
new file mode 100644
index 000000000000..7bb78fd5a2a6
--- /dev/null
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -0,0 +1,204 @@
1/*
2 * linux/arch/arm/mach-mmp/brownstone.c
3 *
4 * Support for the Marvell Brownstone Development Platform.
5 *
6 * Copyright (C) 2009-2010 Marvell International Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * publishhed by the Free Software Foundation.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
16#include <linux/io.h>
17#include <linux/gpio.h>
18#include <linux/regulator/machine.h>
19#include <linux/regulator/max8649.h>
20#include <linux/regulator/fixed.h>
21#include <linux/mfd/max8925.h>
22
23#include <asm/mach-types.h>
24#include <asm/mach/arch.h>
25#include <mach/addr-map.h>
26#include <mach/mfp-mmp2.h>
27#include <mach/mmp2.h>
28#include <mach/irqs.h>
29
30#include "common.h"
31
32#define BROWNSTONE_NR_IRQS (IRQ_BOARD_START + 40)
33
34#define GPIO_5V_ENABLE (89)
35
36static unsigned long brownstone_pin_config[] __initdata = {
37 /* UART1 */
38 GPIO29_UART1_RXD,
39 GPIO30_UART1_TXD,
40
41 /* UART3 */
42 GPIO51_UART3_RXD,
43 GPIO52_UART3_TXD,
44
45 /* DFI */
46 GPIO168_DFI_D0,
47 GPIO167_DFI_D1,
48 GPIO166_DFI_D2,
49 GPIO165_DFI_D3,
50 GPIO107_DFI_D4,
51 GPIO106_DFI_D5,
52 GPIO105_DFI_D6,
53 GPIO104_DFI_D7,
54 GPIO111_DFI_D8,
55 GPIO164_DFI_D9,
56 GPIO163_DFI_D10,
57 GPIO162_DFI_D11,
58 GPIO161_DFI_D12,
59 GPIO110_DFI_D13,
60 GPIO109_DFI_D14,
61 GPIO108_DFI_D15,
62 GPIO143_ND_nCS0,
63 GPIO144_ND_nCS1,
64 GPIO147_ND_nWE,
65 GPIO148_ND_nRE,
66 GPIO150_ND_ALE,
67 GPIO149_ND_CLE,
68 GPIO112_ND_RDY0,
69 GPIO160_ND_RDY1,
70
71 /* PMIC */
72 PMIC_PMIC_INT | MFP_LPM_EDGE_FALL,
73
74 /* MMC0 */
75 GPIO131_MMC1_DAT3 | MFP_PULL_HIGH,
76 GPIO132_MMC1_DAT2 | MFP_PULL_HIGH,
77 GPIO133_MMC1_DAT1 | MFP_PULL_HIGH,
78 GPIO134_MMC1_DAT0 | MFP_PULL_HIGH,
79 GPIO136_MMC1_CMD | MFP_PULL_HIGH,
80 GPIO139_MMC1_CLK,
81 GPIO140_MMC1_CD | MFP_PULL_LOW,
82 GPIO141_MMC1_WP | MFP_PULL_LOW,
83
84 /* MMC1 */
85 GPIO37_MMC2_DAT3 | MFP_PULL_HIGH,
86 GPIO38_MMC2_DAT2 | MFP_PULL_HIGH,
87 GPIO39_MMC2_DAT1 | MFP_PULL_HIGH,
88 GPIO40_MMC2_DAT0 | MFP_PULL_HIGH,
89 GPIO41_MMC2_CMD | MFP_PULL_HIGH,
90 GPIO42_MMC2_CLK,
91
92 /* MMC2 */
93 GPIO165_MMC3_DAT7 | MFP_PULL_HIGH,
94 GPIO162_MMC3_DAT6 | MFP_PULL_HIGH,
95 GPIO166_MMC3_DAT5 | MFP_PULL_HIGH,
96 GPIO163_MMC3_DAT4 | MFP_PULL_HIGH,
97 GPIO167_MMC3_DAT3 | MFP_PULL_HIGH,
98 GPIO164_MMC3_DAT2 | MFP_PULL_HIGH,
99 GPIO168_MMC3_DAT1 | MFP_PULL_HIGH,
100 GPIO111_MMC3_DAT0 | MFP_PULL_HIGH,
101 GPIO112_MMC3_CMD | MFP_PULL_HIGH,
102 GPIO151_MMC3_CLK,
103
104 /* 5V regulator */
105 GPIO89_GPIO,
106};
107
108static struct regulator_consumer_supply max8649_supply[] = {
109 REGULATOR_SUPPLY("vcc_core", NULL),
110};
111
112static struct regulator_init_data max8649_init_data = {
113 .constraints = {
114 .name = "vcc_core range",
115 .min_uV = 1150000,
116 .max_uV = 1280000,
117 .always_on = 1,
118 .boot_on = 1,
119 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
120 },
121 .num_consumer_supplies = 1,
122 .consumer_supplies = &max8649_supply[0],
123};
124
125static struct max8649_platform_data brownstone_max8649_info = {
126 .mode = 2, /* VID1 = 1, VID0 = 0 */
127 .extclk = 0,
128 .ramp_timing = MAX8649_RAMP_32MV,
129 .regulator = &max8649_init_data,
130};
131
132static struct regulator_consumer_supply brownstone_v_5vp_supplies[] = {
133 REGULATOR_SUPPLY("v_5vp", NULL),
134};
135
136static struct regulator_init_data brownstone_v_5vp_data = {
137 .constraints = {
138 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
139 },
140 .num_consumer_supplies = ARRAY_SIZE(brownstone_v_5vp_supplies),
141 .consumer_supplies = brownstone_v_5vp_supplies,
142};
143
144static struct fixed_voltage_config brownstone_v_5vp = {
145 .supply_name = "v_5vp",
146 .microvolts = 5000000,
147 .gpio = GPIO_5V_ENABLE,
148 .enable_high = 1,
149 .enabled_at_boot = 1,
150 .init_data = &brownstone_v_5vp_data,
151};
152
153static struct platform_device brownstone_v_5vp_device = {
154 .name = "reg-fixed-voltage",
155 .id = 1,
156 .dev = {
157 .platform_data = &brownstone_v_5vp,
158 },
159};
160
161static struct max8925_platform_data brownstone_max8925_info = {
162 .irq_base = IRQ_BOARD_START,
163};
164
165static struct i2c_board_info brownstone_twsi1_info[] = {
166 [0] = {
167 .type = "max8649",
168 .addr = 0x60,
169 .platform_data = &brownstone_max8649_info,
170 },
171 [1] = {
172 .type = "max8925",
173 .addr = 0x3c,
174 .irq = IRQ_MMP2_PMIC,
175 .platform_data = &brownstone_max8925_info,
176 },
177};
178
179static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc0 = {
180 .max_speed = 25000000,
181};
182
183static void __init brownstone_init(void)
184{
185 mfp_config(ARRAY_AND_SIZE(brownstone_pin_config));
186
187 /* on-chip devices */
188 mmp2_add_uart(1);
189 mmp2_add_uart(3);
190 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info));
191 mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
192
193 /* enable 5v regulator */
194 platform_device_register(&brownstone_v_5vp_device);
195}
196
197MACHINE_START(BROWNSTONE, "Brownstone Development Platform")
198 /* Maintainer: Haojian Zhuang <haojian.zhuang@marvell.com> */
199 .map_io = mmp_map_io,
200 .nr_irqs = BROWNSTONE_NR_IRQS,
201 .init_irq = mmp2_init_irq,
202 .timer = &mmp2_timer,
203 .init_machine = brownstone_init,
204MACHINE_END
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index bdeb6db4d49a..c4fd806b15b4 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -47,7 +47,7 @@ static unsigned long flint_pin_config[] __initdata = {
47 GPIO113_SMC_RDY, 47 GPIO113_SMC_RDY,
48 48
49 /*Ethernet*/ 49 /*Ethernet*/
50 GPIO155_GPIO155, 50 GPIO155_GPIO,
51 51
52 /* DFI */ 52 /* DFI */
53 GPIO168_DFI_D0, 53 GPIO168_DFI_D0,
diff --git a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
index 761c2dacc079..117e30366087 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
@@ -9,175 +9,175 @@
9#define MFP_DRIVE_FAST (0x8 << 13) 9#define MFP_DRIVE_FAST (0x8 << 13)
10 10
11/* GPIO */ 11/* GPIO */
12#define GPIO0_GPIO0 MFP_CFG(GPIO0, AF0) 12#define GPIO0_GPIO MFP_CFG(GPIO0, AF0)
13#define GPIO1_GPIO1 MFP_CFG(GPIO1, AF0) 13#define GPIO1_GPIO MFP_CFG(GPIO1, AF0)
14#define GPIO2_GPIO2 MFP_CFG(GPIO2, AF0) 14#define GPIO2_GPIO MFP_CFG(GPIO2, AF0)
15#define GPIO3_GPIO3 MFP_CFG(GPIO3, AF0) 15#define GPIO3_GPIO MFP_CFG(GPIO3, AF0)
16#define GPIO4_GPIO4 MFP_CFG(GPIO4, AF0) 16#define GPIO4_GPIO MFP_CFG(GPIO4, AF0)
17#define GPIO5_GPIO5 MFP_CFG(GPIO5, AF0) 17#define GPIO5_GPIO MFP_CFG(GPIO5, AF0)
18#define GPIO6_GPIO6 MFP_CFG(GPIO6, AF0) 18#define GPIO6_GPIO MFP_CFG(GPIO6, AF0)
19#define GPIO7_GPIO7 MFP_CFG(GPIO7, AF0) 19#define GPIO7_GPIO MFP_CFG(GPIO7, AF0)
20#define GPIO8_GPIO8 MFP_CFG(GPIO8, AF0) 20#define GPIO8_GPIO MFP_CFG(GPIO8, AF0)
21#define GPIO9_GPIO9 MFP_CFG(GPIO9, AF0) 21#define GPIO9_GPIO MFP_CFG(GPIO9, AF0)
22#define GPIO10_GPIO10 MFP_CFG(GPIO10, AF0) 22#define GPIO10_GPIO MFP_CFG(GPIO10, AF0)
23#define GPIO11_GPIO11 MFP_CFG(GPIO11, AF0) 23#define GPIO11_GPIO MFP_CFG(GPIO11, AF0)
24#define GPIO12_GPIO12 MFP_CFG(GPIO12, AF0) 24#define GPIO12_GPIO MFP_CFG(GPIO12, AF0)
25#define GPIO13_GPIO13 MFP_CFG(GPIO13, AF0) 25#define GPIO13_GPIO MFP_CFG(GPIO13, AF0)
26#define GPIO14_GPIO14 MFP_CFG(GPIO14, AF0) 26#define GPIO14_GPIO MFP_CFG(GPIO14, AF0)
27#define GPIO15_GPIO15 MFP_CFG(GPIO15, AF0) 27#define GPIO15_GPIO MFP_CFG(GPIO15, AF0)
28#define GPIO16_GPIO16 MFP_CFG(GPIO16, AF0) 28#define GPIO16_GPIO MFP_CFG(GPIO16, AF0)
29#define GPIO17_GPIO17 MFP_CFG(GPIO17, AF0) 29#define GPIO17_GPIO MFP_CFG(GPIO17, AF0)
30#define GPIO18_GPIO18 MFP_CFG(GPIO18, AF0) 30#define GPIO18_GPIO MFP_CFG(GPIO18, AF0)
31#define GPIO19_GPIO19 MFP_CFG(GPIO19, AF0) 31#define GPIO19_GPIO MFP_CFG(GPIO19, AF0)
32#define GPIO20_GPIO20 MFP_CFG(GPIO20, AF0) 32#define GPIO20_GPIO MFP_CFG(GPIO20, AF0)
33#define GPIO21_GPIO21 MFP_CFG(GPIO21, AF0) 33#define GPIO21_GPIO MFP_CFG(GPIO21, AF0)
34#define GPIO22_GPIO22 MFP_CFG(GPIO22, AF0) 34#define GPIO22_GPIO MFP_CFG(GPIO22, AF0)
35#define GPIO23_GPIO23 MFP_CFG(GPIO23, AF0) 35#define GPIO23_GPIO MFP_CFG(GPIO23, AF0)
36#define GPIO24_GPIO24 MFP_CFG(GPIO24, AF0) 36#define GPIO24_GPIO MFP_CFG(GPIO24, AF0)
37#define GPIO25_GPIO25 MFP_CFG(GPIO25, AF0) 37#define GPIO25_GPIO MFP_CFG(GPIO25, AF0)
38#define GPIO26_GPIO26 MFP_CFG(GPIO26, AF0) 38#define GPIO26_GPIO MFP_CFG(GPIO26, AF0)
39#define GPIO27_GPIO27 MFP_CFG(GPIO27, AF0) 39#define GPIO27_GPIO MFP_CFG(GPIO27, AF0)
40#define GPIO28_GPIO28 MFP_CFG(GPIO28, AF0) 40#define GPIO28_GPIO MFP_CFG(GPIO28, AF0)
41#define GPIO29_GPIO29 MFP_CFG(GPIO29, AF0) 41#define GPIO29_GPIO MFP_CFG(GPIO29, AF0)
42#define GPIO30_GPIO30 MFP_CFG(GPIO30, AF0) 42#define GPIO30_GPIO MFP_CFG(GPIO30, AF0)
43#define GPIO31_GPIO31 MFP_CFG(GPIO31, AF0) 43#define GPIO31_GPIO MFP_CFG(GPIO31, AF0)
44#define GPIO32_GPIO32 MFP_CFG(GPIO32, AF0) 44#define GPIO32_GPIO MFP_CFG(GPIO32, AF0)
45#define GPIO33_GPIO33 MFP_CFG(GPIO33, AF0) 45#define GPIO33_GPIO MFP_CFG(GPIO33, AF0)
46#define GPIO34_GPIO34 MFP_CFG(GPIO34, AF0) 46#define GPIO34_GPIO MFP_CFG(GPIO34, AF0)
47#define GPIO35_GPIO35 MFP_CFG(GPIO35, AF0) 47#define GPIO35_GPIO MFP_CFG(GPIO35, AF0)
48#define GPIO36_GPIO36 MFP_CFG(GPIO36, AF0) 48#define GPIO36_GPIO MFP_CFG(GPIO36, AF0)
49#define GPIO37_GPIO37 MFP_CFG(GPIO37, AF0) 49#define GPIO37_GPIO MFP_CFG(GPIO37, AF0)
50#define GPIO38_GPIO38 MFP_CFG(GPIO38, AF0) 50#define GPIO38_GPIO MFP_CFG(GPIO38, AF0)
51#define GPIO39_GPIO39 MFP_CFG(GPIO39, AF0) 51#define GPIO39_GPIO MFP_CFG(GPIO39, AF0)
52#define GPIO40_GPIO40 MFP_CFG(GPIO40, AF0) 52#define GPIO40_GPIO MFP_CFG(GPIO40, AF0)
53#define GPIO41_GPIO41 MFP_CFG(GPIO41, AF0) 53#define GPIO41_GPIO MFP_CFG(GPIO41, AF0)
54#define GPIO42_GPIO42 MFP_CFG(GPIO42, AF0) 54#define GPIO42_GPIO MFP_CFG(GPIO42, AF0)
55#define GPIO43_GPIO43 MFP_CFG(GPIO43, AF0) 55#define GPIO43_GPIO MFP_CFG(GPIO43, AF0)
56#define GPIO44_GPIO44 MFP_CFG(GPIO44, AF0) 56#define GPIO44_GPIO MFP_CFG(GPIO44, AF0)
57#define GPIO45_GPIO45 MFP_CFG(GPIO45, AF0) 57#define GPIO45_GPIO MFP_CFG(GPIO45, AF0)
58#define GPIO46_GPIO46 MFP_CFG(GPIO46, AF0) 58#define GPIO46_GPIO MFP_CFG(GPIO46, AF0)
59#define GPIO47_GPIO47 MFP_CFG(GPIO47, AF0) 59#define GPIO47_GPIO MFP_CFG(GPIO47, AF0)
60#define GPIO48_GPIO48 MFP_CFG(GPIO48, AF0) 60#define GPIO48_GPIO MFP_CFG(GPIO48, AF0)
61#define GPIO49_GPIO49 MFP_CFG(GPIO49, AF0) 61#define GPIO49_GPIO MFP_CFG(GPIO49, AF0)
62#define GPIO50_GPIO50 MFP_CFG(GPIO50, AF0) 62#define GPIO50_GPIO MFP_CFG(GPIO50, AF0)
63#define GPIO51_GPIO51 MFP_CFG(GPIO51, AF0) 63#define GPIO51_GPIO MFP_CFG(GPIO51, AF0)
64#define GPIO52_GPIO52 MFP_CFG(GPIO52, AF0) 64#define GPIO52_GPIO MFP_CFG(GPIO52, AF0)
65#define GPIO53_GPIO53 MFP_CFG(GPIO53, AF0) 65#define GPIO53_GPIO MFP_CFG(GPIO53, AF0)
66#define GPIO54_GPIO54 MFP_CFG(GPIO54, AF0) 66#define GPIO54_GPIO MFP_CFG(GPIO54, AF0)
67#define GPIO55_GPIO55 MFP_CFG(GPIO55, AF0) 67#define GPIO55_GPIO MFP_CFG(GPIO55, AF0)
68#define GPIO56_GPIO56 MFP_CFG(GPIO56, AF0) 68#define GPIO56_GPIO MFP_CFG(GPIO56, AF0)
69#define GPIO57_GPIO57 MFP_CFG(GPIO57, AF0) 69#define GPIO57_GPIO MFP_CFG(GPIO57, AF0)
70#define GPIO58_GPIO58 MFP_CFG(GPIO58, AF0) 70#define GPIO58_GPIO MFP_CFG(GPIO58, AF0)
71#define GPIO59_GPIO59 MFP_CFG(GPIO59, AF0) 71#define GPIO59_GPIO MFP_CFG(GPIO59, AF0)
72#define GPIO60_GPIO60 MFP_CFG(GPIO60, AF0) 72#define GPIO60_GPIO MFP_CFG(GPIO60, AF0)
73#define GPIO61_GPIO61 MFP_CFG(GPIO61, AF0) 73#define GPIO61_GPIO MFP_CFG(GPIO61, AF0)
74#define GPIO62_GPIO62 MFP_CFG(GPIO62, AF0) 74#define GPIO62_GPIO MFP_CFG(GPIO62, AF0)
75#define GPIO63_GPIO63 MFP_CFG(GPIO63, AF0) 75#define GPIO63_GPIO MFP_CFG(GPIO63, AF0)
76#define GPIO64_GPIO64 MFP_CFG(GPIO64, AF0) 76#define GPIO64_GPIO MFP_CFG(GPIO64, AF0)
77#define GPIO65_GPIO65 MFP_CFG(GPIO65, AF0) 77#define GPIO65_GPIO MFP_CFG(GPIO65, AF0)
78#define GPIO66_GPIO66 MFP_CFG(GPIO66, AF0) 78#define GPIO66_GPIO MFP_CFG(GPIO66, AF0)
79#define GPIO67_GPIO67 MFP_CFG(GPIO67, AF0) 79#define GPIO67_GPIO MFP_CFG(GPIO67, AF0)
80#define GPIO68_GPIO68 MFP_CFG(GPIO68, AF0) 80#define GPIO68_GPIO MFP_CFG(GPIO68, AF0)
81#define GPIO69_GPIO69 MFP_CFG(GPIO69, AF0) 81#define GPIO69_GPIO MFP_CFG(GPIO69, AF0)
82#define GPIO70_GPIO70 MFP_CFG(GPIO70, AF0) 82#define GPIO70_GPIO MFP_CFG(GPIO70, AF0)
83#define GPIO71_GPIO71 MFP_CFG(GPIO71, AF0) 83#define GPIO71_GPIO MFP_CFG(GPIO71, AF0)
84#define GPIO72_GPIO72 MFP_CFG(GPIO72, AF0) 84#define GPIO72_GPIO MFP_CFG(GPIO72, AF0)
85#define GPIO73_GPIO73 MFP_CFG(GPIO73, AF0) 85#define GPIO73_GPIO MFP_CFG(GPIO73, AF0)
86#define GPIO74_GPIO74 MFP_CFG(GPIO74, AF0) 86#define GPIO74_GPIO MFP_CFG(GPIO74, AF0)
87#define GPIO75_GPIO75 MFP_CFG(GPIO75, AF0) 87#define GPIO75_GPIO MFP_CFG(GPIO75, AF0)
88#define GPIO76_GPIO76 MFP_CFG(GPIO76, AF0) 88#define GPIO76_GPIO MFP_CFG(GPIO76, AF0)
89#define GPIO77_GPIO77 MFP_CFG(GPIO77, AF0) 89#define GPIO77_GPIO MFP_CFG(GPIO77, AF0)
90#define GPIO78_GPIO78 MFP_CFG(GPIO78, AF0) 90#define GPIO78_GPIO MFP_CFG(GPIO78, AF0)
91#define GPIO79_GPIO79 MFP_CFG(GPIO79, AF0) 91#define GPIO79_GPIO MFP_CFG(GPIO79, AF0)
92#define GPIO80_GPIO80 MFP_CFG(GPIO80, AF0) 92#define GPIO80_GPIO MFP_CFG(GPIO80, AF0)
93#define GPIO81_GPIO81 MFP_CFG(GPIO81, AF0) 93#define GPIO81_GPIO MFP_CFG(GPIO81, AF0)
94#define GPIO82_GPIO82 MFP_CFG(GPIO82, AF0) 94#define GPIO82_GPIO MFP_CFG(GPIO82, AF0)
95#define GPIO83_GPIO83 MFP_CFG(GPIO83, AF0) 95#define GPIO83_GPIO MFP_CFG(GPIO83, AF0)
96#define GPIO84_GPIO84 MFP_CFG(GPIO84, AF0) 96#define GPIO84_GPIO MFP_CFG(GPIO84, AF0)
97#define GPIO85_GPIO85 MFP_CFG(GPIO85, AF0) 97#define GPIO85_GPIO MFP_CFG(GPIO85, AF0)
98#define GPIO86_GPIO86 MFP_CFG(GPIO86, AF0) 98#define GPIO86_GPIO MFP_CFG(GPIO86, AF0)
99#define GPIO87_GPIO87 MFP_CFG(GPIO87, AF0) 99#define GPIO87_GPIO MFP_CFG(GPIO87, AF0)
100#define GPIO88_GPIO88 MFP_CFG(GPIO88, AF0) 100#define GPIO88_GPIO MFP_CFG(GPIO88, AF0)
101#define GPIO89_GPIO89 MFP_CFG(GPIO89, AF0) 101#define GPIO89_GPIO MFP_CFG(GPIO89, AF0)
102#define GPIO90_GPIO90 MFP_CFG(GPIO90, AF0) 102#define GPIO90_GPIO MFP_CFG(GPIO90, AF0)
103#define GPIO91_GPIO91 MFP_CFG(GPIO91, AF0) 103#define GPIO91_GPIO MFP_CFG(GPIO91, AF0)
104#define GPIO92_GPIO92 MFP_CFG(GPIO92, AF0) 104#define GPIO92_GPIO MFP_CFG(GPIO92, AF0)
105#define GPIO93_GPIO93 MFP_CFG(GPIO93, AF0) 105#define GPIO93_GPIO MFP_CFG(GPIO93, AF0)
106#define GPIO94_GPIO94 MFP_CFG(GPIO94, AF0) 106#define GPIO94_GPIO MFP_CFG(GPIO94, AF0)
107#define GPIO95_GPIO95 MFP_CFG(GPIO95, AF0) 107#define GPIO95_GPIO MFP_CFG(GPIO95, AF0)
108#define GPIO96_GPIO96 MFP_CFG(GPIO96, AF0) 108#define GPIO96_GPIO MFP_CFG(GPIO96, AF0)
109#define GPIO97_GPIO97 MFP_CFG(GPIO97, AF0) 109#define GPIO97_GPIO MFP_CFG(GPIO97, AF0)
110#define GPIO98_GPIO98 MFP_CFG(GPIO98, AF0) 110#define GPIO98_GPIO MFP_CFG(GPIO98, AF0)
111#define GPIO99_GPIO99 MFP_CFG(GPIO99, AF0) 111#define GPIO99_GPIO MFP_CFG(GPIO99, AF0)
112#define GPIO100_GPIO100 MFP_CFG(GPIO100, AF0) 112#define GPIO100_GPIO MFP_CFG(GPIO100, AF0)
113#define GPIO101_GPIO101 MFP_CFG(GPIO101, AF0) 113#define GPIO101_GPIO MFP_CFG(GPIO101, AF0)
114#define GPIO102_GPIO102 MFP_CFG(GPIO102, AF1) 114#define GPIO102_GPIO MFP_CFG(GPIO102, AF1)
115#define GPIO103_GPIO103 MFP_CFG(GPIO103, AF1) 115#define GPIO103_GPIO MFP_CFG(GPIO103, AF1)
116#define GPIO104_GPIO104 MFP_CFG(GPIO104, AF1) 116#define GPIO104_GPIO MFP_CFG(GPIO104, AF1)
117#define GPIO105_GPIO105 MFP_CFG(GPIO105, AF1) 117#define GPIO105_GPIO MFP_CFG(GPIO105, AF1)
118#define GPIO106_GPIO106 MFP_CFG(GPIO106, AF1) 118#define GPIO106_GPIO MFP_CFG(GPIO106, AF1)
119#define GPIO107_GPIO107 MFP_CFG(GPIO107, AF1) 119#define GPIO107_GPIO MFP_CFG(GPIO107, AF1)
120#define GPIO108_GPIO108 MFP_CFG(GPIO108, AF1) 120#define GPIO108_GPIO MFP_CFG(GPIO108, AF1)
121#define GPIO109_GPIO109 MFP_CFG(GPIO109, AF1) 121#define GPIO109_GPIO MFP_CFG(GPIO109, AF1)
122#define GPIO110_GPIO110 MFP_CFG(GPIO110, AF1) 122#define GPIO110_GPIO MFP_CFG(GPIO110, AF1)
123#define GPIO111_GPIO111 MFP_CFG(GPIO111, AF1) 123#define GPIO111_GPIO MFP_CFG(GPIO111, AF1)
124#define GPIO112_GPIO112 MFP_CFG(GPIO112, AF1) 124#define GPIO112_GPIO MFP_CFG(GPIO112, AF1)
125#define GPIO113_GPIO113 MFP_CFG(GPIO113, AF1) 125#define GPIO113_GPIO MFP_CFG(GPIO113, AF1)
126#define GPIO114_GPIO114 MFP_CFG(GPIO114, AF0) 126#define GPIO114_GPIO MFP_CFG(GPIO114, AF0)
127#define GPIO115_GPIO115 MFP_CFG(GPIO115, AF0) 127#define GPIO115_GPIO MFP_CFG(GPIO115, AF0)
128#define GPIO116_GPIO116 MFP_CFG(GPIO116, AF0) 128#define GPIO116_GPIO MFP_CFG(GPIO116, AF0)
129#define GPIO117_GPIO117 MFP_CFG(GPIO117, AF0) 129#define GPIO117_GPIO MFP_CFG(GPIO117, AF0)
130#define GPIO118_GPIO118 MFP_CFG(GPIO118, AF0) 130#define GPIO118_GPIO MFP_CFG(GPIO118, AF0)
131#define GPIO119_GPIO119 MFP_CFG(GPIO119, AF0) 131#define GPIO119_GPIO MFP_CFG(GPIO119, AF0)
132#define GPIO120_GPIO120 MFP_CFG(GPIO120, AF0) 132#define GPIO120_GPIO MFP_CFG(GPIO120, AF0)
133#define GPIO121_GPIO121 MFP_CFG(GPIO121, AF0) 133#define GPIO121_GPIO MFP_CFG(GPIO121, AF0)
134#define GPIO122_GPIO122 MFP_CFG(GPIO122, AF0) 134#define GPIO122_GPIO MFP_CFG(GPIO122, AF0)
135#define GPIO123_GPIO123 MFP_CFG(GPIO123, AF0) 135#define GPIO123_GPIO MFP_CFG(GPIO123, AF0)
136#define GPIO124_GPIO124 MFP_CFG(GPIO124, AF0) 136#define GPIO124_GPIO MFP_CFG(GPIO124, AF0)
137#define GPIO125_GPIO125 MFP_CFG(GPIO125, AF0) 137#define GPIO125_GPIO MFP_CFG(GPIO125, AF0)
138#define GPIO126_GPIO126 MFP_CFG(GPIO126, AF0) 138#define GPIO126_GPIO MFP_CFG(GPIO126, AF0)
139#define GPIO127_GPIO127 MFP_CFG(GPIO127, AF0) 139#define GPIO127_GPIO MFP_CFG(GPIO127, AF0)
140#define GPIO128_GPIO128 MFP_CFG(GPIO128, AF0) 140#define GPIO128_GPIO MFP_CFG(GPIO128, AF0)
141#define GPIO129_GPIO129 MFP_CFG(GPIO129, AF0) 141#define GPIO129_GPIO MFP_CFG(GPIO129, AF0)
142#define GPIO130_GPIO130 MFP_CFG(GPIO130, AF0) 142#define GPIO130_GPIO MFP_CFG(GPIO130, AF0)
143#define GPIO131_GPIO131 MFP_CFG(GPIO131, AF0) 143#define GPIO131_GPIO MFP_CFG(GPIO131, AF0)
144#define GPIO132_GPIO132 MFP_CFG(GPIO132, AF0) 144#define GPIO132_GPIO MFP_CFG(GPIO132, AF0)
145#define GPIO133_GPIO133 MFP_CFG(GPIO133, AF0) 145#define GPIO133_GPIO MFP_CFG(GPIO133, AF0)
146#define GPIO134_GPIO134 MFP_CFG(GPIO134, AF0) 146#define GPIO134_GPIO MFP_CFG(GPIO134, AF0)
147#define GPIO135_GPIO135 MFP_CFG(GPIO135, AF0) 147#define GPIO135_GPIO MFP_CFG(GPIO135, AF0)
148#define GPIO136_GPIO136 MFP_CFG(GPIO136, AF0) 148#define GPIO136_GPIO MFP_CFG(GPIO136, AF0)
149#define GPIO137_GPIO137 MFP_CFG(GPIO137, AF0) 149#define GPIO137_GPIO MFP_CFG(GPIO137, AF0)
150#define GPIO138_GPIO138 MFP_CFG(GPIO138, AF0) 150#define GPIO138_GPIO MFP_CFG(GPIO138, AF0)
151#define GPIO139_GPIO139 MFP_CFG(GPIO139, AF0) 151#define GPIO139_GPIO MFP_CFG(GPIO139, AF0)
152#define GPIO140_GPIO140 MFP_CFG(GPIO140, AF0) 152#define GPIO140_GPIO MFP_CFG(GPIO140, AF0)
153#define GPIO141_GPIO141 MFP_CFG(GPIO141, AF0) 153#define GPIO141_GPIO MFP_CFG(GPIO141, AF0)
154#define GPIO142_GPIO142 MFP_CFG(GPIO142, AF1) 154#define GPIO142_GPIO MFP_CFG(GPIO142, AF1)
155#define GPIO143_GPIO143 MFP_CFG(GPIO143, AF1) 155#define GPIO143_GPIO MFP_CFG(GPIO143, AF1)
156#define GPIO144_GPIO144 MFP_CFG(GPIO144, AF1) 156#define GPIO144_GPIO MFP_CFG(GPIO144, AF1)
157#define GPIO145_GPIO145 MFP_CFG(GPIO145, AF1) 157#define GPIO145_GPIO MFP_CFG(GPIO145, AF1)
158#define GPIO146_GPIO146 MFP_CFG(GPIO146, AF1) 158#define GPIO146_GPIO MFP_CFG(GPIO146, AF1)
159#define GPIO147_GPIO147 MFP_CFG(GPIO147, AF1) 159#define GPIO147_GPIO MFP_CFG(GPIO147, AF1)
160#define GPIO148_GPIO148 MFP_CFG(GPIO148, AF1) 160#define GPIO148_GPIO MFP_CFG(GPIO148, AF1)
161#define GPIO149_GPIO149 MFP_CFG(GPIO149, AF1) 161#define GPIO149_GPIO MFP_CFG(GPIO149, AF1)
162#define GPIO150_GPIO150 MFP_CFG(GPIO150, AF1) 162#define GPIO150_GPIO MFP_CFG(GPIO150, AF1)
163#define GPIO151_GPIO151 MFP_CFG(GPIO151, AF1) 163#define GPIO151_GPIO MFP_CFG(GPIO151, AF1)
164#define GPIO152_GPIO152 MFP_CFG(GPIO152, AF1) 164#define GPIO152_GPIO MFP_CFG(GPIO152, AF1)
165#define GPIO153_GPIO153 MFP_CFG(GPIO153, AF1) 165#define GPIO153_GPIO MFP_CFG(GPIO153, AF1)
166#define GPIO154_GPIO154 MFP_CFG(GPIO154, AF1) 166#define GPIO154_GPIO MFP_CFG(GPIO154, AF1)
167#define GPIO155_GPIO155 MFP_CFG(GPIO155, AF1) 167#define GPIO155_GPIO MFP_CFG(GPIO155, AF1)
168#define GPIO156_GPIO156 MFP_CFG(GPIO156, AF1) 168#define GPIO156_GPIO MFP_CFG(GPIO156, AF1)
169#define GPIO157_GPIO157 MFP_CFG(GPIO157, AF1) 169#define GPIO157_GPIO MFP_CFG(GPIO157, AF1)
170#define GPIO158_GPIO158 MFP_CFG(GPIO158, AF1) 170#define GPIO158_GPIO MFP_CFG(GPIO158, AF1)
171#define GPIO159_GPIO159 MFP_CFG(GPIO159, AF1) 171#define GPIO159_GPIO MFP_CFG(GPIO159, AF1)
172#define GPIO160_GPIO160 MFP_CFG(GPIO160, AF1) 172#define GPIO160_GPIO MFP_CFG(GPIO160, AF1)
173#define GPIO161_GPIO161 MFP_CFG(GPIO161, AF1) 173#define GPIO161_GPIO MFP_CFG(GPIO161, AF1)
174#define GPIO162_GPIO162 MFP_CFG(GPIO162, AF1) 174#define GPIO162_GPIO MFP_CFG(GPIO162, AF1)
175#define GPIO163_GPIO163 MFP_CFG(GPIO163, AF1) 175#define GPIO163_GPIO MFP_CFG(GPIO163, AF1)
176#define GPIO164_GPIO164 MFP_CFG(GPIO164, AF1) 176#define GPIO164_GPIO MFP_CFG(GPIO164, AF1)
177#define GPIO165_GPIO165 MFP_CFG(GPIO165, AF1) 177#define GPIO165_GPIO MFP_CFG(GPIO165, AF1)
178#define GPIO166_GPIO166 MFP_CFG(GPIO166, AF1) 178#define GPIO166_GPIO MFP_CFG(GPIO166, AF1)
179#define GPIO167_GPIO167 MFP_CFG(GPIO167, AF1) 179#define GPIO167_GPIO MFP_CFG(GPIO167, AF1)
180#define GPIO168_GPIO168 MFP_CFG(GPIO168, AF1) 180#define GPIO168_GPIO MFP_CFG(GPIO168, AF1)
181 181
182/* DFI */ 182/* DFI */
183#define GPIO108_DFI_D15 MFP_CFG(GPIO108, AF0) 183#define GPIO108_DFI_D15 MFP_CFG(GPIO108, AF0)
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
index dbba6e8a60c4..4aec493640b4 100644
--- a/arch/arm/mach-mmp/include/mach/mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_MACH_MMP2_H 1#ifndef __ASM_MACH_MMP2_H
2#define __ASM_MACH_MMP2_H 2#define __ASM_MACH_MMP2_H
3 3
4#include <plat/sdhci.h>
5
4struct sys_timer; 6struct sys_timer;
5 7
6extern struct sys_timer mmp2_timer; 8extern struct sys_timer mmp2_timer;
@@ -22,6 +24,10 @@ extern struct pxa_device_desc mmp2_device_twsi3;
22extern struct pxa_device_desc mmp2_device_twsi4; 24extern struct pxa_device_desc mmp2_device_twsi4;
23extern struct pxa_device_desc mmp2_device_twsi5; 25extern struct pxa_device_desc mmp2_device_twsi5;
24extern struct pxa_device_desc mmp2_device_twsi6; 26extern struct pxa_device_desc mmp2_device_twsi6;
27extern struct pxa_device_desc mmp2_device_sdh0;
28extern struct pxa_device_desc mmp2_device_sdh1;
29extern struct pxa_device_desc mmp2_device_sdh2;
30extern struct pxa_device_desc mmp2_device_sdh3;
25 31
26static inline int mmp2_add_uart(int id) 32static inline int mmp2_add_uart(int id)
27{ 33{
@@ -63,5 +69,21 @@ static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data,
63 return pxa_register_device(d, data, sizeof(*data)); 69 return pxa_register_device(d, data, sizeof(*data));
64} 70}
65 71
72static inline int mmp2_add_sdhost(int id, struct sdhci_pxa_platdata *data)
73{
74 struct pxa_device_desc *d = NULL;
75
76 switch (id) {
77 case 0: d = &mmp2_device_sdh0; break;
78 case 1: d = &mmp2_device_sdh1; break;
79 case 2: d = &mmp2_device_sdh2; break;
80 case 3: d = &mmp2_device_sdh3; break;
81 default:
82 return -EINVAL;
83 }
84
85 return pxa_register_device(d, data, sizeof(*data));
86}
87
66#endif /* __ASM_MACH_MMP2_H */ 88#endif /* __ASM_MACH_MMP2_H */
67 89
diff --git a/arch/arm/mach-mmp/include/mach/regs-apmu.h b/arch/arm/mach-mmp/include/mach/regs-apmu.h
index ac4702357a6e..f7011ef70bf5 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apmu.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apmu.h
@@ -27,6 +27,8 @@
27#define APMU_DMA APMU_REG(0x064) 27#define APMU_DMA APMU_REG(0x064)
28#define APMU_GEU APMU_REG(0x068) 28#define APMU_GEU APMU_REG(0x068)
29#define APMU_BUS APMU_REG(0x06c) 29#define APMU_BUS APMU_REG(0x06c)
30#define APMU_SDH2 APMU_REG(0x0e8)
31#define APMU_SDH3 APMU_REG(0x0ec)
30 32
31#define APMU_FNCLK_EN (1 << 4) 33#define APMU_FNCLK_EN (1 << 4)
32#define APMU_AXICLK_EN (1 << 3) 34#define APMU_AXICLK_EN (1 << 3)
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index 2a684fa50773..24172a0aad59 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -67,6 +67,36 @@ static unsigned long jasper_pin_config[] __initdata = {
67 67
68 /* PMIC */ 68 /* PMIC */
69 PMIC_PMIC_INT | MFP_LPM_EDGE_FALL, 69 PMIC_PMIC_INT | MFP_LPM_EDGE_FALL,
70
71 /* MMC1 */
72 GPIO131_MMC1_DAT3,
73 GPIO132_MMC1_DAT2,
74 GPIO133_MMC1_DAT1,
75 GPIO134_MMC1_DAT0,
76 GPIO136_MMC1_CMD,
77 GPIO139_MMC1_CLK,
78 GPIO140_MMC1_CD,
79 GPIO141_MMC1_WP,
80
81 /* MMC2 */
82 GPIO37_MMC2_DAT3,
83 GPIO38_MMC2_DAT2,
84 GPIO39_MMC2_DAT1,
85 GPIO40_MMC2_DAT0,
86 GPIO41_MMC2_CMD,
87 GPIO42_MMC2_CLK,
88
89 /* MMC3 */
90 GPIO165_MMC3_DAT7,
91 GPIO162_MMC3_DAT6,
92 GPIO166_MMC3_DAT5,
93 GPIO163_MMC3_DAT4,
94 GPIO167_MMC3_DAT3,
95 GPIO164_MMC3_DAT2,
96 GPIO168_MMC3_DAT1,
97 GPIO111_MMC3_DAT0,
98 GPIO112_MMC3_CMD,
99 GPIO151_MMC3_CLK,
70}; 100};
71 101
72static struct regulator_consumer_supply max8649_supply[] = { 102static struct regulator_consumer_supply max8649_supply[] = {
@@ -123,6 +153,10 @@ static struct i2c_board_info jasper_twsi1_info[] = {
123 }, 153 },
124}; 154};
125 155
156static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc0 = {
157 .max_speed = 25000000,
158};
159
126static void __init jasper_init(void) 160static void __init jasper_init(void)
127{ 161{
128 mfp_config(ARRAY_AND_SIZE(jasper_pin_config)); 162 mfp_config(ARRAY_AND_SIZE(jasper_pin_config));
@@ -131,6 +165,7 @@ static void __init jasper_init(void)
131 mmp2_add_uart(1); 165 mmp2_add_uart(1);
132 mmp2_add_uart(3); 166 mmp2_add_uart(3);
133 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(jasper_twsi1_info)); 167 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(jasper_twsi1_info));
168 mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
134 169
135 regulator_has_full_constraints(); 170 regulator_has_full_constraints();
136} 171}
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 2e3dd08ccc3f..8e6c3ac7f7c1 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -115,6 +115,29 @@ void __init mmp2_init_irq(void)
115 mmp2_init_gpio(); 115 mmp2_init_gpio();
116} 116}
117 117
118static void sdhc_clk_enable(struct clk *clk)
119{
120 uint32_t clk_rst;
121
122 clk_rst = __raw_readl(clk->clk_rst);
123 clk_rst |= clk->enable_val;
124 __raw_writel(clk_rst, clk->clk_rst);
125}
126
127static void sdhc_clk_disable(struct clk *clk)
128{
129 uint32_t clk_rst;
130
131 clk_rst = __raw_readl(clk->clk_rst);
132 clk_rst &= ~clk->enable_val;
133 __raw_writel(clk_rst, clk->clk_rst);
134}
135
136struct clkops sdhc_clk_ops = {
137 .enable = sdhc_clk_enable,
138 .disable = sdhc_clk_disable,
139};
140
118/* APB peripheral clocks */ 141/* APB peripheral clocks */
119static APBC_CLK(uart1, MMP2_UART1, 1, 26000000); 142static APBC_CLK(uart1, MMP2_UART1, 1, 26000000);
120static APBC_CLK(uart2, MMP2_UART2, 1, 26000000); 143static APBC_CLK(uart2, MMP2_UART2, 1, 26000000);
@@ -128,6 +151,10 @@ static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
128static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000); 151static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
129 152
130static APMU_CLK(nand, NAND, 0xbf, 100000000); 153static APMU_CLK(nand, NAND, 0xbf, 100000000);
154static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops);
155static APMU_CLK_OPS(sdh1, SDH1, 0x1b, 200000000, &sdhc_clk_ops);
156static APMU_CLK_OPS(sdh2, SDH2, 0x1b, 200000000, &sdhc_clk_ops);
157static APMU_CLK_OPS(sdh3, SDH3, 0x1b, 200000000, &sdhc_clk_ops);
131 158
132static struct clk_lookup mmp2_clkregs[] = { 159static struct clk_lookup mmp2_clkregs[] = {
133 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), 160 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
@@ -141,6 +168,10 @@ static struct clk_lookup mmp2_clkregs[] = {
141 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL), 168 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
142 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL), 169 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
143 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 170 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
171 INIT_CLKREG(&clk_sdh0, "sdhci-pxa.0", "PXA-SDHCLK"),
172 INIT_CLKREG(&clk_sdh1, "sdhci-pxa.1", "PXA-SDHCLK"),
173 INIT_CLKREG(&clk_sdh2, "sdhci-pxa.2", "PXA-SDHCLK"),
174 INIT_CLKREG(&clk_sdh3, "sdhci-pxa.3", "PXA-SDHCLK"),
144}; 175};
145 176
146static int __init mmp2_init(void) 177static int __init mmp2_init(void)
@@ -191,4 +222,8 @@ MMP2_DEVICE(twsi4, "pxa2xx-i2c", 3, TWSI4, 0xd4033000, 0x70);
191MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70); 222MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70);
192MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70); 223MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70);
193MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29); 224MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29);
225MMP2_DEVICE(sdh0, "sdhci-pxa", 0, MMC, 0xd4280000, 0x120);
226MMP2_DEVICE(sdh1, "sdhci-pxa", 1, MMC2, 0xd4280800, 0x120);
227MMP2_DEVICE(sdh2, "sdhci-pxa", 2, MMC3, 0xd4281000, 0x120);
228MMP2_DEVICE(sdh3, "sdhci-pxa", 3, MMC4, 0xd4281800, 0x120);
194 229
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 46f2d69bef3c..8f92ccd26edf 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -111,6 +111,7 @@ static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
111static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); 111static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
112 112
113static APMU_CLK(nand, NAND, 0x01db, 208000000); 113static APMU_CLK(nand, NAND, 0x01db, 208000000);
114static APMU_CLK(u2o, USB, 0x1b, 480000000);
114 115
115/* device and clock bindings */ 116/* device and clock bindings */
116static struct clk_lookup pxa910_clkregs[] = { 117static struct clk_lookup pxa910_clkregs[] = {
@@ -123,6 +124,7 @@ static struct clk_lookup pxa910_clkregs[] = {
123 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL), 124 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
124 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), 125 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
125 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 126 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
127 INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"),
126}; 128};
127 129
128static int __init pxa910_init(void) 130static int __init pxa910_init(void)
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-23 22:23:21 -0500