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authorZhangfei Gao <zhangfei.gao@marvell.com>2010-09-29 16:18:51 -0400
committerEric Miao <eric.y.miao@gmail.com>2010-12-16 01:31:17 -0500
commit5382f419c128c85af3933958d73b18ed063d0264 (patch)
treeea6818457c4e163a8a414b88f3694316a61e1e5a /arch/arm/mach-mmp
parentad68bb9f7a3cd47396635a5e3895215af57579da (diff)
ARM: mmp: add mmc resource
Signed-off-by: Zhangfei Gao <zhangfei.gao@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-mmp')
-rw-r--r--arch/arm/mach-mmp/include/mach/mmp2.h22
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apmu.h2
-rw-r--r--arch/arm/mach-mmp/mmp2.c35
3 files changed, 59 insertions, 0 deletions
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
index dbba6e8a60c4..4aec493640b4 100644
--- a/arch/arm/mach-mmp/include/mach/mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_MACH_MMP2_H 1#ifndef __ASM_MACH_MMP2_H
2#define __ASM_MACH_MMP2_H 2#define __ASM_MACH_MMP2_H
3 3
4#include <plat/sdhci.h>
5
4struct sys_timer; 6struct sys_timer;
5 7
6extern struct sys_timer mmp2_timer; 8extern struct sys_timer mmp2_timer;
@@ -22,6 +24,10 @@ extern struct pxa_device_desc mmp2_device_twsi3;
22extern struct pxa_device_desc mmp2_device_twsi4; 24extern struct pxa_device_desc mmp2_device_twsi4;
23extern struct pxa_device_desc mmp2_device_twsi5; 25extern struct pxa_device_desc mmp2_device_twsi5;
24extern struct pxa_device_desc mmp2_device_twsi6; 26extern struct pxa_device_desc mmp2_device_twsi6;
27extern struct pxa_device_desc mmp2_device_sdh0;
28extern struct pxa_device_desc mmp2_device_sdh1;
29extern struct pxa_device_desc mmp2_device_sdh2;
30extern struct pxa_device_desc mmp2_device_sdh3;
25 31
26static inline int mmp2_add_uart(int id) 32static inline int mmp2_add_uart(int id)
27{ 33{
@@ -63,5 +69,21 @@ static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data,
63 return pxa_register_device(d, data, sizeof(*data)); 69 return pxa_register_device(d, data, sizeof(*data));
64} 70}
65 71
72static inline int mmp2_add_sdhost(int id, struct sdhci_pxa_platdata *data)
73{
74 struct pxa_device_desc *d = NULL;
75
76 switch (id) {
77 case 0: d = &mmp2_device_sdh0; break;
78 case 1: d = &mmp2_device_sdh1; break;
79 case 2: d = &mmp2_device_sdh2; break;
80 case 3: d = &mmp2_device_sdh3; break;
81 default:
82 return -EINVAL;
83 }
84
85 return pxa_register_device(d, data, sizeof(*data));
86}
87
66#endif /* __ASM_MACH_MMP2_H */ 88#endif /* __ASM_MACH_MMP2_H */
67 89
diff --git a/arch/arm/mach-mmp/include/mach/regs-apmu.h b/arch/arm/mach-mmp/include/mach/regs-apmu.h
index ac4702357a6e..f7011ef70bf5 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apmu.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apmu.h
@@ -27,6 +27,8 @@
27#define APMU_DMA APMU_REG(0x064) 27#define APMU_DMA APMU_REG(0x064)
28#define APMU_GEU APMU_REG(0x068) 28#define APMU_GEU APMU_REG(0x068)
29#define APMU_BUS APMU_REG(0x06c) 29#define APMU_BUS APMU_REG(0x06c)
30#define APMU_SDH2 APMU_REG(0x0e8)
31#define APMU_SDH3 APMU_REG(0x0ec)
30 32
31#define APMU_FNCLK_EN (1 << 4) 33#define APMU_FNCLK_EN (1 << 4)
32#define APMU_AXICLK_EN (1 << 3) 34#define APMU_AXICLK_EN (1 << 3)
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 2e3dd08ccc3f..8e6c3ac7f7c1 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -115,6 +115,29 @@ void __init mmp2_init_irq(void)
115 mmp2_init_gpio(); 115 mmp2_init_gpio();
116} 116}
117 117
118static void sdhc_clk_enable(struct clk *clk)
119{
120 uint32_t clk_rst;
121
122 clk_rst = __raw_readl(clk->clk_rst);
123 clk_rst |= clk->enable_val;
124 __raw_writel(clk_rst, clk->clk_rst);
125}
126
127static void sdhc_clk_disable(struct clk *clk)
128{
129 uint32_t clk_rst;
130
131 clk_rst = __raw_readl(clk->clk_rst);
132 clk_rst &= ~clk->enable_val;
133 __raw_writel(clk_rst, clk->clk_rst);
134}
135
136struct clkops sdhc_clk_ops = {
137 .enable = sdhc_clk_enable,
138 .disable = sdhc_clk_disable,
139};
140
118/* APB peripheral clocks */ 141/* APB peripheral clocks */
119static APBC_CLK(uart1, MMP2_UART1, 1, 26000000); 142static APBC_CLK(uart1, MMP2_UART1, 1, 26000000);
120static APBC_CLK(uart2, MMP2_UART2, 1, 26000000); 143static APBC_CLK(uart2, MMP2_UART2, 1, 26000000);
@@ -128,6 +151,10 @@ static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
128static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000); 151static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
129 152
130static APMU_CLK(nand, NAND, 0xbf, 100000000); 153static APMU_CLK(nand, NAND, 0xbf, 100000000);
154static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops);
155static APMU_CLK_OPS(sdh1, SDH1, 0x1b, 200000000, &sdhc_clk_ops);
156static APMU_CLK_OPS(sdh2, SDH2, 0x1b, 200000000, &sdhc_clk_ops);
157static APMU_CLK_OPS(sdh3, SDH3, 0x1b, 200000000, &sdhc_clk_ops);
131 158
132static struct clk_lookup mmp2_clkregs[] = { 159static struct clk_lookup mmp2_clkregs[] = {
133 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), 160 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
@@ -141,6 +168,10 @@ static struct clk_lookup mmp2_clkregs[] = {
141 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL), 168 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
142 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL), 169 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
143 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 170 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
171 INIT_CLKREG(&clk_sdh0, "sdhci-pxa.0", "PXA-SDHCLK"),
172 INIT_CLKREG(&clk_sdh1, "sdhci-pxa.1", "PXA-SDHCLK"),
173 INIT_CLKREG(&clk_sdh2, "sdhci-pxa.2", "PXA-SDHCLK"),
174 INIT_CLKREG(&clk_sdh3, "sdhci-pxa.3", "PXA-SDHCLK"),
144}; 175};
145 176
146static int __init mmp2_init(void) 177static int __init mmp2_init(void)
@@ -191,4 +222,8 @@ MMP2_DEVICE(twsi4, "pxa2xx-i2c", 3, TWSI4, 0xd4033000, 0x70);
191MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70); 222MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70);
192MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70); 223MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70);
193MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29); 224MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29);
225MMP2_DEVICE(sdh0, "sdhci-pxa", 0, MMC, 0xd4280000, 0x120);
226MMP2_DEVICE(sdh1, "sdhci-pxa", 1, MMC2, 0xd4280800, 0x120);
227MMP2_DEVICE(sdh2, "sdhci-pxa", 2, MMC3, 0xd4281000, 0x120);
228MMP2_DEVICE(sdh3, "sdhci-pxa", 3, MMC4, 0xd4281800, 0x120);
194 229