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authorThomas Gleixner <tglx@linutronix.de>2011-03-24 08:25:22 -0400
committerThomas Gleixner <tglx@linutronix.de>2011-03-29 08:47:57 -0400
commit6845664a6a7d443f03883db59d10749d38d98b8e (patch)
tree4b4499f4d41f24152190220d93ea186fbf991fca /arch/arm/mach-mmp
parent25a5662a13e604d86b0a9fd71703582a7393d8ec (diff)
arm: Cleanup the irq namespace
Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arm/mach-mmp')
-rw-r--r--arch/arm/mach-mmp/irq-mmp2.c18
-rw-r--r--arch/arm/mach-mmp/irq-pxa168.c4
2 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c
index fa037038e7b8..d21c5441a3d0 100644
--- a/arch/arm/mach-mmp/irq-mmp2.c
+++ b/arch/arm/mach-mmp/irq-mmp2.c
@@ -110,9 +110,9 @@ static void init_mux_irq(struct irq_chip *chip, int start, int num)
110 if (chip->irq_ack) 110 if (chip->irq_ack)
111 chip->irq_ack(d); 111 chip->irq_ack(d);
112 112
113 set_irq_chip(irq, chip); 113 irq_set_chip(irq, chip);
114 set_irq_flags(irq, IRQF_VALID); 114 set_irq_flags(irq, IRQF_VALID);
115 set_irq_handler(irq, handle_level_irq); 115 irq_set_handler(irq, handle_level_irq);
116 } 116 }
117} 117}
118 118
@@ -122,7 +122,7 @@ void __init mmp2_init_icu(void)
122 122
123 for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) { 123 for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) {
124 icu_mask_irq(irq_get_irq_data(irq)); 124 icu_mask_irq(irq_get_irq_data(irq));
125 set_irq_chip(irq, &icu_irq_chip); 125 irq_set_chip(irq, &icu_irq_chip);
126 set_irq_flags(irq, IRQF_VALID); 126 set_irq_flags(irq, IRQF_VALID);
127 127
128 switch (irq) { 128 switch (irq) {
@@ -133,7 +133,7 @@ void __init mmp2_init_icu(void)
133 case IRQ_MMP2_SSP_MUX: 133 case IRQ_MMP2_SSP_MUX:
134 break; 134 break;
135 default: 135 default:
136 set_irq_handler(irq, handle_level_irq); 136 irq_set_handler(irq, handle_level_irq);
137 break; 137 break;
138 } 138 }
139 } 139 }
@@ -149,9 +149,9 @@ void __init mmp2_init_icu(void)
149 init_mux_irq(&misc_irq_chip, IRQ_MMP2_MISC_BASE, 15); 149 init_mux_irq(&misc_irq_chip, IRQ_MMP2_MISC_BASE, 15);
150 init_mux_irq(&ssp_irq_chip, IRQ_MMP2_SSP_BASE, 2); 150 init_mux_irq(&ssp_irq_chip, IRQ_MMP2_SSP_BASE, 2);
151 151
152 set_irq_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux); 152 irq_set_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux);
153 set_irq_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux); 153 irq_set_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux);
154 set_irq_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux); 154 irq_set_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux);
155 set_irq_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux); 155 irq_set_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux);
156 set_irq_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux); 156 irq_set_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux);
157} 157}
diff --git a/arch/arm/mach-mmp/irq-pxa168.c b/arch/arm/mach-mmp/irq-pxa168.c
index f86b450cb93c..6a8676205e6e 100644
--- a/arch/arm/mach-mmp/irq-pxa168.c
+++ b/arch/arm/mach-mmp/irq-pxa168.c
@@ -48,8 +48,8 @@ void __init icu_init_irq(void)
48 48
49 for (irq = 0; irq < 64; irq++) { 49 for (irq = 0; irq < 64; irq++) {
50 icu_mask_irq(irq_get_irq_data(irq)); 50 icu_mask_irq(irq_get_irq_data(irq));
51 set_irq_chip(irq, &icu_irq_chip); 51 irq_set_chip(irq, &icu_irq_chip);
52 set_irq_handler(irq, handle_level_irq); 52 irq_set_handler(irq, handle_level_irq);
53 set_irq_flags(irq, IRQF_VALID); 53 set_irq_flags(irq, IRQF_VALID);
54 } 54 }
55} 55}