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authorHaojian Zhuang <haojian.zhuang@marvell.com>2010-02-03 10:01:18 -0500
committerEric Miao <eric.y.miao@gmail.com>2010-03-01 18:40:57 -0500
commitdf0c382436df5bdd74030baafa294b75c231ec8c (patch)
treedbcf772218fcc1dde83ebb08395f1d1fa6326e51 /arch/arm/mach-mmp/mmp2.c
parentce0ac4235972cc2533e4e2095396208b59117c57 (diff)
[ARM] mmp2: add handling on PMIC IRQ
Since PMIC INT pin is a special pin of CPU, the status of PMIC INT pin needs to be cleared after PMIC IRQ occured. Now append the clear operation in irq chip handler. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-mmp/mmp2.c')
-rw-r--r--arch/arm/mach-mmp/mmp2.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 0f1c441cc898..72eb9daeea99 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -37,6 +37,16 @@ static struct mfp_addr_map mmp2_addr_map[] __initdata = {
37 MFP_ADDR_END, 37 MFP_ADDR_END,
38}; 38};
39 39
40void mmp2_clear_pmic_int(void)
41{
42 unsigned long mfpr_pmic, data;
43
44 mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4;
45 data = __raw_readl(mfpr_pmic);
46 __raw_writel(data | (1 << 6), mfpr_pmic);
47 __raw_writel(data, mfpr_pmic);
48}
49
40static void __init mmp2_init_gpio(void) 50static void __init mmp2_init_gpio(void)
41{ 51{
42 int i; 52 int i;