diff options
author | Arnd Bergmann <arnd@arndb.de> | 2011-10-01 16:03:45 -0400 |
---|---|---|
committer | Eric Miao <eric.y.miao@gmail.com> | 2011-10-08 09:03:07 -0400 |
commit | 97b09da4ee36ec4bd0f6e16b84b4bb6fa05db110 (patch) | |
tree | 34c80d050a0cc8538d0fc22213772560dc3db2f3 /arch/arm/mach-mmp/include | |
parent | 7272889d3f40ed6aa2ade32bed5834789b3299cc (diff) |
ARM: pxa: use correct __iomem annotations
This tries to clear up the confusion between integers and iomem pointers
in the marvell pxa platform. MMIO addresses are supposed to be __iomem*
values, in order to let the Linux type checking work correctly. This
patch moves the cast to __iomem as far back as possible, to the place
where the MMIO virtual address windows are defined.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-mmp/include')
-rw-r--r-- | arch/arm/mach-mmp/include/mach/addr-map.h | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/mach-mmp/include/mach/addr-map.h b/arch/arm/mach-mmp/include/mach/addr-map.h index 3254089a644d..3e404acd6ff4 100644 --- a/arch/arm/mach-mmp/include/mach/addr-map.h +++ b/arch/arm/mach-mmp/include/mach/addr-map.h | |||
@@ -11,6 +11,12 @@ | |||
11 | #ifndef __ASM_MACH_ADDR_MAP_H | 11 | #ifndef __ASM_MACH_ADDR_MAP_H |
12 | #define __ASM_MACH_ADDR_MAP_H | 12 | #define __ASM_MACH_ADDR_MAP_H |
13 | 13 | ||
14 | #ifndef __ASSEMBLER__ | ||
15 | #define IOMEM(x) ((void __iomem *)(x)) | ||
16 | #else | ||
17 | #define IOMEM(x) (x) | ||
18 | #endif | ||
19 | |||
14 | /* APB - Application Subsystem Peripheral Bus | 20 | /* APB - Application Subsystem Peripheral Bus |
15 | * | 21 | * |
16 | * NOTE: the DMA controller registers are actually on the AXI fabric #1 | 22 | * NOTE: the DMA controller registers are actually on the AXI fabric #1 |
@@ -18,11 +24,11 @@ | |||
18 | * peripherals on APB, let's count it into the ABP mapping area. | 24 | * peripherals on APB, let's count it into the ABP mapping area. |
19 | */ | 25 | */ |
20 | #define APB_PHYS_BASE 0xd4000000 | 26 | #define APB_PHYS_BASE 0xd4000000 |
21 | #define APB_VIRT_BASE 0xfe000000 | 27 | #define APB_VIRT_BASE IOMEM(0xfe000000) |
22 | #define APB_PHYS_SIZE 0x00200000 | 28 | #define APB_PHYS_SIZE 0x00200000 |
23 | 29 | ||
24 | #define AXI_PHYS_BASE 0xd4200000 | 30 | #define AXI_PHYS_BASE 0xd4200000 |
25 | #define AXI_VIRT_BASE 0xfe200000 | 31 | #define AXI_VIRT_BASE IOMEM(0xfe200000) |
26 | #define AXI_PHYS_SIZE 0x00200000 | 32 | #define AXI_PHYS_SIZE 0x00200000 |
27 | 33 | ||
28 | /* Static Memory Controller - Chip Select 0 and 1 */ | 34 | /* Static Memory Controller - Chip Select 0 and 1 */ |