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authorLinus Torvalds <torvalds@linux-foundation.org>2009-03-28 17:03:14 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-03-28 17:03:14 -0400
commit0fe41b8982001cd14ee2c77cd776735a5024e98b (patch)
tree83e65d595c413d55259ea14fb97748ce5efe5707 /arch/arm/mach-mmp/clock.h
parenteedf2c5296a8dfaaf9aec1a938c1d3bd73159a30 (diff)
parent9759d22c8348343b0da4e25d6150c41712686c14 (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (422 commits) [ARM] 5435/1: fix compile warning in sanity_check_meminfo() [ARM] 5434/1: ARM: OMAP: Fix mailbox compile for 24xx [ARM] pxa: fix the bad assumption that PCMCIA sockets always start with 0 [ARM] pxa: fix Colibri PXA300 and PXA320 LCD backlight pins imxfb: Fix TFT mode i.MX21/27: remove ifdef CONFIG_FB_IMX imxfb: add clock support mxc: add arch_reset() function clkdev: add possibility to get a clock based on the device name i.MX1: remove fb support from mach-imx [ARM] pxa: build arch/arm/plat-pxa/mfp.c only when PXA3xx or ARCH_MMP defined Gemini: Add support for Teltonika RUT100 Gemini: gpiolib based GPIO support v2 MAINTAINERS: add myself as Gemini architecture maintainer ARM: Add Gemini architecture v3 [ARM] OMAP: Fix compile for omap2_init_common_hw() MAINTAINERS: Add myself as Faraday ARM core variant maintainer ARM: Add support for FA526 v2 [ARM] acorn,ebsa110,footbridge,integrator,sa1100: Convert asm/io.h to linux/io.h [ARM] collie: fix two minor formatting nits ...
Diffstat (limited to 'arch/arm/mach-mmp/clock.h')
-rw-r--r--arch/arm/mach-mmp/clock.h71
1 files changed, 71 insertions, 0 deletions
diff --git a/arch/arm/mach-mmp/clock.h b/arch/arm/mach-mmp/clock.h
new file mode 100644
index 000000000000..ed967e78e6a8
--- /dev/null
+++ b/arch/arm/mach-mmp/clock.h
@@ -0,0 +1,71 @@
1/*
2 * linux/arch/arm/mach-mmp/clock.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <asm/clkdev.h>
10
11struct clkops {
12 void (*enable)(struct clk *);
13 void (*disable)(struct clk *);
14 unsigned long (*getrate)(struct clk *);
15};
16
17struct clk {
18 const struct clkops *ops;
19
20 void __iomem *clk_rst; /* clock reset control register */
21 int fnclksel; /* functional clock select (APBC) */
22 uint32_t enable_val; /* value for clock enable (APMU) */
23 unsigned long rate;
24 int enabled;
25};
26
27extern struct clkops apbc_clk_ops;
28
29#define APBC_CLK(_name, _reg, _fnclksel, _rate) \
30struct clk clk_##_name = { \
31 .clk_rst = (void __iomem *)APBC_##_reg, \
32 .fnclksel = _fnclksel, \
33 .rate = _rate, \
34 .ops = &apbc_clk_ops, \
35}
36
37#define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \
38struct clk clk_##_name = { \
39 .clk_rst = (void __iomem *)APBC_##_reg, \
40 .fnclksel = _fnclksel, \
41 .rate = _rate, \
42 .ops = _ops, \
43}
44
45#define APMU_CLK(_name, _reg, _eval, _rate) \
46struct clk clk_##_name = { \
47 .clk_rst = (void __iomem *)APMU_##_reg, \
48 .enable_val = _eval, \
49 .rate = _rate, \
50 .ops = &apmu_clk_ops, \
51}
52
53#define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \
54struct clk clk_##_name = { \
55 .clk_rst = (void __iomem *)APMU_##_reg, \
56 .enable_val = _eval, \
57 .rate = _rate, \
58 .ops = _ops, \
59}
60
61#define INIT_CLKREG(_clk, _devname, _conname) \
62 { \
63 .clk = _clk, \
64 .dev_id = _devname, \
65 .con_id = _conname, \
66 }
67
68extern struct clk clk_pxa168_gpio;
69extern struct clk clk_pxa168_timers;
70
71extern void clks_register(struct clk_lookup *, size_t);