diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2011-10-01 16:03:45 -0400 |
|---|---|---|
| committer | Eric Miao <eric.y.miao@gmail.com> | 2011-10-08 09:03:07 -0400 |
| commit | 97b09da4ee36ec4bd0f6e16b84b4bb6fa05db110 (patch) | |
| tree | 34c80d050a0cc8538d0fc22213772560dc3db2f3 /arch/arm/mach-mmp/clock.h | |
| parent | 7272889d3f40ed6aa2ade32bed5834789b3299cc (diff) | |
ARM: pxa: use correct __iomem annotations
This tries to clear up the confusion between integers and iomem pointers
in the marvell pxa platform. MMIO addresses are supposed to be __iomem*
values, in order to let the Linux type checking work correctly. This
patch moves the cast to __iomem as far back as possible, to the place
where the MMIO virtual address windows are defined.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-mmp/clock.h')
| -rw-r--r-- | arch/arm/mach-mmp/clock.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-mmp/clock.h b/arch/arm/mach-mmp/clock.h index 3143e994e672..149b30cd1469 100644 --- a/arch/arm/mach-mmp/clock.h +++ b/arch/arm/mach-mmp/clock.h | |||
| @@ -30,7 +30,7 @@ extern struct clkops apmu_clk_ops; | |||
| 30 | 30 | ||
| 31 | #define APBC_CLK(_name, _reg, _fnclksel, _rate) \ | 31 | #define APBC_CLK(_name, _reg, _fnclksel, _rate) \ |
| 32 | struct clk clk_##_name = { \ | 32 | struct clk clk_##_name = { \ |
| 33 | .clk_rst = (void __iomem *)APBC_##_reg, \ | 33 | .clk_rst = APBC_##_reg, \ |
| 34 | .fnclksel = _fnclksel, \ | 34 | .fnclksel = _fnclksel, \ |
| 35 | .rate = _rate, \ | 35 | .rate = _rate, \ |
| 36 | .ops = &apbc_clk_ops, \ | 36 | .ops = &apbc_clk_ops, \ |
| @@ -38,7 +38,7 @@ struct clk clk_##_name = { \ | |||
| 38 | 38 | ||
| 39 | #define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \ | 39 | #define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \ |
| 40 | struct clk clk_##_name = { \ | 40 | struct clk clk_##_name = { \ |
| 41 | .clk_rst = (void __iomem *)APBC_##_reg, \ | 41 | .clk_rst = APBC_##_reg, \ |
| 42 | .fnclksel = _fnclksel, \ | 42 | .fnclksel = _fnclksel, \ |
| 43 | .rate = _rate, \ | 43 | .rate = _rate, \ |
| 44 | .ops = _ops, \ | 44 | .ops = _ops, \ |
| @@ -46,7 +46,7 @@ struct clk clk_##_name = { \ | |||
| 46 | 46 | ||
| 47 | #define APMU_CLK(_name, _reg, _eval, _rate) \ | 47 | #define APMU_CLK(_name, _reg, _eval, _rate) \ |
| 48 | struct clk clk_##_name = { \ | 48 | struct clk clk_##_name = { \ |
| 49 | .clk_rst = (void __iomem *)APMU_##_reg, \ | 49 | .clk_rst = APMU_##_reg, \ |
| 50 | .enable_val = _eval, \ | 50 | .enable_val = _eval, \ |
| 51 | .rate = _rate, \ | 51 | .rate = _rate, \ |
| 52 | .ops = &apmu_clk_ops, \ | 52 | .ops = &apmu_clk_ops, \ |
| @@ -54,7 +54,7 @@ struct clk clk_##_name = { \ | |||
| 54 | 54 | ||
| 55 | #define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \ | 55 | #define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \ |
| 56 | struct clk clk_##_name = { \ | 56 | struct clk clk_##_name = { \ |
| 57 | .clk_rst = (void __iomem *)APMU_##_reg, \ | 57 | .clk_rst = APMU_##_reg, \ |
| 58 | .enable_val = _eval, \ | 58 | .enable_val = _eval, \ |
| 59 | .rate = _rate, \ | 59 | .rate = _rate, \ |
| 60 | .ops = _ops, \ | 60 | .ops = _ops, \ |