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authorRoland Stigge <stigge@antcom.de>2012-02-08 15:41:02 -0500
committerOlof Johansson <olof@lixom.net>2012-02-09 18:55:50 -0500
commitf40a6818857e00c1d0ecec9af832f46a83f12f53 (patch)
treed28695cae6ea9c343f6968c31ea3c61bad86f451 /arch/arm/mach-lpc32xx
parent8998316c425ed2b36ca3b01a658f08a7d006a4f9 (diff)
ARM: LPC32xx: clock.c: jiffies wrapping
This patch fixes the jiffies wrapping bug in clock.c. It corrects the timeout computation based on jiffies, uses time_before() for correct wrapping handling and replaces a binary "&" which should really be a logical "&&" in a truth expression. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Tested-by: Wolfram Sang <w.sang@pengutronix.de> Acked-by: Kevin Wells <kevin.wells@nxp.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-lpc32xx')
-rw-r--r--arch/arm/mach-lpc32xx/clock.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c
index 09dfa490a218..6a15e3655a57 100644
--- a/arch/arm/mach-lpc32xx/clock.c
+++ b/arch/arm/mach-lpc32xx/clock.c
@@ -129,7 +129,7 @@ static struct clk osc_32KHz = {
129static int local_pll397_enable(struct clk *clk, int enable) 129static int local_pll397_enable(struct clk *clk, int enable)
130{ 130{
131 u32 reg; 131 u32 reg;
132 unsigned long timeout = 1 + msecs_to_jiffies(10); 132 unsigned long timeout = jiffies + msecs_to_jiffies(10);
133 133
134 reg = __raw_readl(LPC32XX_CLKPWR_PLL397_CTRL); 134 reg = __raw_readl(LPC32XX_CLKPWR_PLL397_CTRL);
135 135
@@ -144,7 +144,7 @@ static int local_pll397_enable(struct clk *clk, int enable)
144 /* Wait for PLL397 lock */ 144 /* Wait for PLL397 lock */
145 while (((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) & 145 while (((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) &
146 LPC32XX_CLKPWR_SYSCTRL_PLL397_STS) == 0) && 146 LPC32XX_CLKPWR_SYSCTRL_PLL397_STS) == 0) &&
147 (timeout > jiffies)) 147 time_before(jiffies, timeout))
148 cpu_relax(); 148 cpu_relax();
149 149
150 if ((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) & 150 if ((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) &
@@ -158,7 +158,7 @@ static int local_pll397_enable(struct clk *clk, int enable)
158static int local_oscmain_enable(struct clk *clk, int enable) 158static int local_oscmain_enable(struct clk *clk, int enable)
159{ 159{
160 u32 reg; 160 u32 reg;
161 unsigned long timeout = 1 + msecs_to_jiffies(10); 161 unsigned long timeout = jiffies + msecs_to_jiffies(10);
162 162
163 reg = __raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL); 163 reg = __raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL);
164 164
@@ -173,7 +173,7 @@ static int local_oscmain_enable(struct clk *clk, int enable)
173 /* Wait for main oscillator to start */ 173 /* Wait for main oscillator to start */
174 while (((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) & 174 while (((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) &
175 LPC32XX_CLKPWR_MOSC_DISABLE) != 0) && 175 LPC32XX_CLKPWR_MOSC_DISABLE) != 0) &&
176 (timeout > jiffies)) 176 time_before(jiffies, timeout))
177 cpu_relax(); 177 cpu_relax();
178 178
179 if ((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) & 179 if ((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) &
@@ -385,7 +385,7 @@ static int local_usbpll_enable(struct clk *clk, int enable)
385{ 385{
386 u32 reg; 386 u32 reg;
387 int ret = -ENODEV; 387 int ret = -ENODEV;
388 unsigned long timeout = 1 + msecs_to_jiffies(10); 388 unsigned long timeout = jiffies + msecs_to_jiffies(10);
389 389
390 reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL); 390 reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
391 391
@@ -398,7 +398,7 @@ static int local_usbpll_enable(struct clk *clk, int enable)
398 __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL); 398 __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
399 399
400 /* Wait for PLL lock */ 400 /* Wait for PLL lock */
401 while ((timeout > jiffies) & (ret == -ENODEV)) { 401 while (time_before(jiffies, timeout) && (ret == -ENODEV)) {
402 reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL); 402 reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
403 if (reg & LPC32XX_CLKPWR_USBCTRL_PLL_STS) 403 if (reg & LPC32XX_CLKPWR_USBCTRL_PLL_STS)
404 ret = 0; 404 ret = 0;