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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-12-13 08:17:52 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-12-22 17:44:32 -0500
commit594cbf2f4ceaaacc706eb1302ff139a61092ec6f (patch)
treeb79f4c41d2aeee3ba9f2caf0e66f21d080a24a26 /arch/arm/mach-lpc32xx/timer.c
parentb7c7c50adcf0d9c901542c5db8d795fe226bb454 (diff)
ARM: lpc32xx: update clock source registration
In d7e81c2 (clocksource: Add clocksource_register_hz/khz interface) new interfaces were added which simplify (and optimize) the selection of the divisor shift/mult constants. Switch over to using this new interface. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-lpc32xx/timer.c')
-rw-r--r--arch/arm/mach-lpc32xx/timer.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/arm/mach-lpc32xx/timer.c b/arch/arm/mach-lpc32xx/timer.c
index 630dd4a74b26..6162ac308c20 100644
--- a/arch/arm/mach-lpc32xx/timer.c
+++ b/arch/arm/mach-lpc32xx/timer.c
@@ -38,7 +38,6 @@ static cycle_t lpc32xx_clksrc_read(struct clocksource *cs)
38 38
39static struct clocksource lpc32xx_clksrc = { 39static struct clocksource lpc32xx_clksrc = {
40 .name = "lpc32xx_clksrc", 40 .name = "lpc32xx_clksrc",
41 .shift = 24,
42 .rating = 300, 41 .rating = 300,
43 .read = lpc32xx_clksrc_read, 42 .read = lpc32xx_clksrc_read,
44 .mask = CLOCKSOURCE_MASK(32), 43 .mask = CLOCKSOURCE_MASK(32),
@@ -171,9 +170,7 @@ static void __init lpc32xx_timer_init(void)
171 __raw_writel(0, LCP32XX_TIMER_MCR(LPC32XX_TIMER1_BASE)); 170 __raw_writel(0, LCP32XX_TIMER_MCR(LPC32XX_TIMER1_BASE));
172 __raw_writel(LCP32XX_TIMER_CNTR_TCR_EN, 171 __raw_writel(LCP32XX_TIMER_CNTR_TCR_EN,
173 LCP32XX_TIMER_TCR(LPC32XX_TIMER1_BASE)); 172 LCP32XX_TIMER_TCR(LPC32XX_TIMER1_BASE));
174 lpc32xx_clksrc.mult = clocksource_hz2mult(clkrate, 173 clocksource_register_hz(&lpc32xx_clksrc, clkrate);
175 lpc32xx_clksrc.shift);
176 clocksource_register(&lpc32xx_clksrc);
177} 174}
178 175
179struct sys_timer lpc32xx_timer = { 176struct sys_timer lpc32xx_timer = {