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authorRoland Stigge <stigge@antcom.de>2012-06-14 10:16:16 -0400
committerRoland Stigge <stigge@antcom.de>2012-06-14 10:16:16 -0400
commitba225a0ea225902501487a2c9f620c26dce1cee6 (patch)
treec0252a6756cd03e3bb74950e1b46011aefa88152 /arch/arm/mach-lpc32xx/phy3250.c
parentb27f48227c59754e1c881bd8e2b327ac02fe17b6 (diff)
ARM: LPC32xx: Remove SLC controller initialization from platform init
Since we now support two MTD NAND controllers (MLC and SLC) for LPC32xx via DT, we don't initialize the SLC controller statically anymore, but do it via the clock setup (see previous patch). Signed-off-by: Roland Stigge <stigge@antcom.de> Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Diffstat (limited to 'arch/arm/mach-lpc32xx/phy3250.c')
-rw-r--r--arch/arm/mach-lpc32xx/phy3250.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index 540106cdb9ec..42a078eb1665 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -241,10 +241,6 @@ static void __init lpc3250_machine_init(void)
241{ 241{
242 u32 tmp; 242 u32 tmp;
243 243
244 /* Setup SLC NAND controller muxing */
245 __raw_writel(LPC32XX_CLKPWR_NANDCLK_SEL_SLC,
246 LPC32XX_CLKPWR_NAND_CLK_CTRL);
247
248 /* Setup LCD muxing to RGB565 */ 244 /* Setup LCD muxing to RGB565 */
249 tmp = __raw_readl(LPC32XX_CLKPWR_LCDCLK_CTRL) & 245 tmp = __raw_readl(LPC32XX_CLKPWR_LCDCLK_CTRL) &
250 ~(LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_MSK | 246 ~(LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_MSK |