diff options
author | David Woodhouse <David.Woodhouse@intel.com> | 2010-10-30 07:35:11 -0400 |
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committer | David Woodhouse <David.Woodhouse@intel.com> | 2010-10-30 07:35:11 -0400 |
commit | 67577927e8d7a1f4b09b4992df640eadc6aacb36 (patch) | |
tree | 2e9efe6b5745965faf0dcc084d4613d9356263f9 /arch/arm/mach-lpc32xx/phy3250.c | |
parent | 6fe4c590313133ebd5dadb769031489ff178ece1 (diff) | |
parent | 51f00a471ce8f359627dd99aeac322947a0e491b (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
Conflicts:
drivers/mtd/mtd_blkdevs.c
Merge Grant's device-tree bits so that we can apply the subsequent fixes.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'arch/arm/mach-lpc32xx/phy3250.c')
-rw-r--r-- | arch/arm/mach-lpc32xx/phy3250.c | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index bc9a42da2145..7993b096778e 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c | |||
@@ -172,18 +172,12 @@ static void phy3250_spi_cs_set(u32 control) | |||
172 | } | 172 | } |
173 | 173 | ||
174 | static struct pl022_config_chip spi0_chip_info = { | 174 | static struct pl022_config_chip spi0_chip_info = { |
175 | .lbm = LOOPBACK_DISABLED, | ||
176 | .com_mode = INTERRUPT_TRANSFER, | 175 | .com_mode = INTERRUPT_TRANSFER, |
177 | .iface = SSP_INTERFACE_MOTOROLA_SPI, | 176 | .iface = SSP_INTERFACE_MOTOROLA_SPI, |
178 | .hierarchy = SSP_MASTER, | 177 | .hierarchy = SSP_MASTER, |
179 | .slave_tx_disable = 0, | 178 | .slave_tx_disable = 0, |
180 | .endian_tx = SSP_TX_LSB, | ||
181 | .endian_rx = SSP_RX_LSB, | ||
182 | .data_size = SSP_DATA_BITS_8, | ||
183 | .rx_lev_trig = SSP_RX_4_OR_MORE_ELEM, | 179 | .rx_lev_trig = SSP_RX_4_OR_MORE_ELEM, |
184 | .tx_lev_trig = SSP_TX_4_OR_MORE_EMPTY_LOC, | 180 | .tx_lev_trig = SSP_TX_4_OR_MORE_EMPTY_LOC, |
185 | .clk_phase = SSP_CLK_FIRST_EDGE, | ||
186 | .clk_pol = SSP_CLK_POL_IDLE_LOW, | ||
187 | .ctrl_len = SSP_BITS_8, | 181 | .ctrl_len = SSP_BITS_8, |
188 | .wait_state = SSP_MWIRE_WAIT_ZERO, | 182 | .wait_state = SSP_MWIRE_WAIT_ZERO, |
189 | .duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX, | 183 | .duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX, |
@@ -239,6 +233,7 @@ static int __init phy3250_spi_board_register(void) | |||
239 | .max_speed_hz = 5000000, | 233 | .max_speed_hz = 5000000, |
240 | .bus_num = 0, | 234 | .bus_num = 0, |
241 | .chip_select = 0, | 235 | .chip_select = 0, |
236 | .mode = SPI_MODE_0, | ||
242 | .platform_data = &eeprom, | 237 | .platform_data = &eeprom, |
243 | .controller_data = &spi0_chip_info, | 238 | .controller_data = &spi0_chip_info, |
244 | }, | 239 | }, |
@@ -387,8 +382,6 @@ arch_initcall(lpc32xx_display_uid); | |||
387 | 382 | ||
388 | MACHINE_START(PHY3250, "Phytec 3250 board with the LPC3250 Microcontroller") | 383 | MACHINE_START(PHY3250, "Phytec 3250 board with the LPC3250 Microcontroller") |
389 | /* Maintainer: Kevin Wells, NXP Semiconductors */ | 384 | /* Maintainer: Kevin Wells, NXP Semiconductors */ |
390 | .phys_io = LPC32XX_UART5_BASE, | ||
391 | .io_pg_offst = ((IO_ADDRESS(LPC32XX_UART5_BASE))>>18) & 0xfffc, | ||
392 | .boot_params = 0x80000100, | 385 | .boot_params = 0x80000100, |
393 | .map_io = lpc32xx_map_io, | 386 | .map_io = lpc32xx_map_io, |
394 | .init_irq = lpc32xx_init_irq, | 387 | .init_irq = lpc32xx_init_irq, |