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authorThomas Gleixner <tglx@linutronix.de>2011-03-24 08:25:22 -0400
committerThomas Gleixner <tglx@linutronix.de>2011-03-29 08:47:57 -0400
commit6845664a6a7d443f03883db59d10749d38d98b8e (patch)
tree4b4499f4d41f24152190220d93ea186fbf991fca /arch/arm/mach-lpc32xx/irq.c
parent25a5662a13e604d86b0a9fd71703582a7393d8ec (diff)
arm: Cleanup the irq namespace
Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arm/mach-lpc32xx/irq.c')
-rw-r--r--arch/arm/mach-lpc32xx/irq.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c
index 316ecbf6c586..3088ca328666 100644
--- a/arch/arm/mach-lpc32xx/irq.c
+++ b/arch/arm/mach-lpc32xx/irq.c
@@ -290,7 +290,7 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type)
290 } 290 }
291 291
292 /* Ok to use the level handler for all types */ 292 /* Ok to use the level handler for all types */
293 set_irq_handler(d->irq, handle_level_irq); 293 irq_set_handler(d->irq, handle_level_irq);
294 294
295 return 0; 295 return 0;
296} 296}
@@ -390,8 +390,8 @@ void __init lpc32xx_init_irq(void)
390 390
391 /* Configure supported IRQ's */ 391 /* Configure supported IRQ's */
392 for (i = 0; i < NR_IRQS; i++) { 392 for (i = 0; i < NR_IRQS; i++) {
393 set_irq_chip(i, &lpc32xx_irq_chip); 393 irq_set_chip(i, &lpc32xx_irq_chip);
394 set_irq_handler(i, handle_level_irq); 394 irq_set_handler(i, handle_level_irq);
395 set_irq_flags(i, IRQF_VALID); 395 set_irq_flags(i, IRQF_VALID);
396 } 396 }
397 397
@@ -406,8 +406,8 @@ void __init lpc32xx_init_irq(void)
406 __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE)); 406 __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
407 407
408 /* MIC SUBIRQx interrupts will route handling to the chain handlers */ 408 /* MIC SUBIRQx interrupts will route handling to the chain handlers */
409 set_irq_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler); 409 irq_set_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler);
410 set_irq_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler); 410 irq_set_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler);
411 411
412 /* Initially disable all wake events */ 412 /* Initially disable all wake events */
413 __raw_writel(0, LPC32XX_CLKPWR_P01_ER); 413 __raw_writel(0, LPC32XX_CLKPWR_P01_ER);