diff options
author | Roland Stigge <stigge@antcom.de> | 2012-07-01 15:06:45 -0400 |
---|---|---|
committer | Roland Stigge <stigge@antcom.de> | 2012-07-01 15:06:45 -0400 |
commit | a0a30b6a69275c54542130a8391e0fda30a4553b (patch) | |
tree | 1a2b8ebacdc0a438358481a35a5a8e474da1da86 /arch/arm/mach-lpc32xx/clock.c | |
parent | b0d9ef0e2df67685ffc74b1bafa648261ede30c0 (diff) |
ARM: LPC32xx: Remove wrong re-initialization of MMC clock register
This patch fixes a bug, (wrongfully) resetting the value of
LPC32XX_CLKPWR_MS_CTRL back to its initial contents (after careful setup). This
was discovered only with a board/bootloader combination (EA3250) where the
contents of the respective register wasn't already at the correct value on
Linux boot.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Diffstat (limited to 'arch/arm/mach-lpc32xx/clock.c')
-rw-r--r-- | arch/arm/mach-lpc32xx/clock.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c index eb1b12092951..b64f98537b5d 100644 --- a/arch/arm/mach-lpc32xx/clock.c +++ b/arch/arm/mach-lpc32xx/clock.c | |||
@@ -871,7 +871,7 @@ static unsigned long mmc_round_rate(struct clk *clk, unsigned long rate) | |||
871 | 871 | ||
872 | static int mmc_set_rate(struct clk *clk, unsigned long rate) | 872 | static int mmc_set_rate(struct clk *clk, unsigned long rate) |
873 | { | 873 | { |
874 | u32 oldclk, tmp; | 874 | u32 tmp; |
875 | unsigned long prate, div, crate = mmc_round_rate(clk, rate); | 875 | unsigned long prate, div, crate = mmc_round_rate(clk, rate); |
876 | 876 | ||
877 | prate = clk->parent->get_rate(clk->parent); | 877 | prate = clk->parent->get_rate(clk->parent); |
@@ -879,16 +879,12 @@ static int mmc_set_rate(struct clk *clk, unsigned long rate) | |||
879 | div = prate / crate; | 879 | div = prate / crate; |
880 | 880 | ||
881 | /* The MMC clock must be on when accessing an MMC register */ | 881 | /* The MMC clock must be on when accessing an MMC register */ |
882 | oldclk = __raw_readl(LPC32XX_CLKPWR_MS_CTRL); | ||
883 | __raw_writel(oldclk | LPC32XX_CLKPWR_MSCARD_SDCARD_EN, | ||
884 | LPC32XX_CLKPWR_MS_CTRL); | ||
885 | tmp = __raw_readl(LPC32XX_CLKPWR_MS_CTRL) & | 882 | tmp = __raw_readl(LPC32XX_CLKPWR_MS_CTRL) & |
886 | ~LPC32XX_CLKPWR_MSCARD_SDCARD_DIV(0xf); | 883 | ~LPC32XX_CLKPWR_MSCARD_SDCARD_DIV(0xf); |
887 | tmp |= LPC32XX_CLKPWR_MSCARD_SDCARD_DIV(div); | 884 | tmp |= LPC32XX_CLKPWR_MSCARD_SDCARD_DIV(div) | |
885 | LPC32XX_CLKPWR_MSCARD_SDCARD_EN; | ||
888 | __raw_writel(tmp, LPC32XX_CLKPWR_MS_CTRL); | 886 | __raw_writel(tmp, LPC32XX_CLKPWR_MS_CTRL); |
889 | 887 | ||
890 | __raw_writel(oldclk, LPC32XX_CLKPWR_MS_CTRL); | ||
891 | |||
892 | return 0; | 888 | return 0; |
893 | } | 889 | } |
894 | 890 | ||