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authorRoland Stigge <stigge@antcom.de>2012-04-22 06:01:19 -0400
committerRoland Stigge <stigge@antcom.de>2012-04-22 06:01:19 -0400
commit171b0a4f951926bf2e2bd58df53d5bd6549fb94a (patch)
treea810871b553f2b2fd66b02cf6bf1e2f5697731c4 /arch/arm/mach-lpc32xx/clock.c
parent5dfdb0a0639751781c440a00ea97630d3eafe7ca (diff)
ARM: LPC32xx: clock.c registration adjustment
This patch adjusts the clocks of the LPC32xx SoC to be picked up correctly by the respective drivers. * AMBA dmaengine * watchdog * I2C * TSC * MMC * Ethernet * ADC * USB Device (All except the pl08xdmac AMBA dmaengine via DT generated device name) Signed-off-by: Roland Stigge <stigge@antcom.de>
Diffstat (limited to 'arch/arm/mach-lpc32xx/clock.c')
-rw-r--r--arch/arm/mach-lpc32xx/clock.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c
index 043b9d47c07a..f6a3ffec1f4b 100644
--- a/arch/arm/mach-lpc32xx/clock.c
+++ b/arch/arm/mach-lpc32xx/clock.c
@@ -1109,27 +1109,27 @@ static struct clk_lookup lookups[] = {
1109 CLKDEV_INIT(NULL, "timer2_ck", &clk_timer2), 1109 CLKDEV_INIT(NULL, "timer2_ck", &clk_timer2),
1110 CLKDEV_INIT(NULL, "timer3_ck", &clk_timer3), 1110 CLKDEV_INIT(NULL, "timer3_ck", &clk_timer3),
1111 CLKDEV_INIT(NULL, "vfp9_ck", &clk_vfp9), 1111 CLKDEV_INIT(NULL, "vfp9_ck", &clk_vfp9),
1112 CLKDEV_INIT(NULL, "clk_dmac", &clk_dma), 1112 CLKDEV_INIT("pl08xdmac", NULL, &clk_dma),
1113 CLKDEV_INIT("pnx4008-watchdog", NULL, &clk_wdt), 1113 CLKDEV_INIT("4003c000.watchdog", NULL, &clk_wdt),
1114 CLKDEV_INIT(NULL, "uart3_ck", &clk_uart3), 1114 CLKDEV_INIT(NULL, "uart3_ck", &clk_uart3),
1115 CLKDEV_INIT(NULL, "uart4_ck", &clk_uart4), 1115 CLKDEV_INIT(NULL, "uart4_ck", &clk_uart4),
1116 CLKDEV_INIT(NULL, "uart5_ck", &clk_uart5), 1116 CLKDEV_INIT(NULL, "uart5_ck", &clk_uart5),
1117 CLKDEV_INIT(NULL, "uart6_ck", &clk_uart6), 1117 CLKDEV_INIT(NULL, "uart6_ck", &clk_uart6),
1118 CLKDEV_INIT("pnx-i2c.0", NULL, &clk_i2c0), 1118 CLKDEV_INIT("400a0000.i2c", NULL, &clk_i2c0),
1119 CLKDEV_INIT("pnx-i2c.1", NULL, &clk_i2c1), 1119 CLKDEV_INIT("400a8000.i2c", NULL, &clk_i2c1),
1120 CLKDEV_INIT("pnx-i2c.2", NULL, &clk_i2c2), 1120 CLKDEV_INIT("31020300.i2c", NULL, &clk_i2c2),
1121 CLKDEV_INIT("dev:ssp0", NULL, &clk_ssp0), 1121 CLKDEV_INIT("dev:ssp0", NULL, &clk_ssp0),
1122 CLKDEV_INIT("dev:ssp1", NULL, &clk_ssp1), 1122 CLKDEV_INIT("dev:ssp1", NULL, &clk_ssp1),
1123 CLKDEV_INIT("lpc32xx_keys.0", NULL, &clk_kscan), 1123 CLKDEV_INIT("lpc32xx_keys.0", NULL, &clk_kscan),
1124 CLKDEV_INIT("lpc32xx-nand.0", "nand_ck", &clk_nand), 1124 CLKDEV_INIT("lpc32xx-nand.0", "nand_ck", &clk_nand),
1125 CLKDEV_INIT("lpc32xx-adc", NULL, &clk_adc), 1125 CLKDEV_INIT("40048000.adc", NULL, &clk_adc),
1126 CLKDEV_INIT(NULL, "i2s0_ck", &clk_i2s0), 1126 CLKDEV_INIT(NULL, "i2s0_ck", &clk_i2s0),
1127 CLKDEV_INIT(NULL, "i2s1_ck", &clk_i2s1), 1127 CLKDEV_INIT(NULL, "i2s1_ck", &clk_i2s1),
1128 CLKDEV_INIT("ts-lpc32xx", NULL, &clk_tsc), 1128 CLKDEV_INIT("40048000.tsc", NULL, &clk_tsc),
1129 CLKDEV_INIT("dev:mmc0", NULL, &clk_mmc), 1129 CLKDEV_INIT("20098000.sd", NULL, &clk_mmc),
1130 CLKDEV_INIT("lpc-eth.0", NULL, &clk_net), 1130 CLKDEV_INIT("31060000.ethernet", NULL, &clk_net),
1131 CLKDEV_INIT("dev:clcd", NULL, &clk_lcd), 1131 CLKDEV_INIT("dev:clcd", NULL, &clk_lcd),
1132 CLKDEV_INIT("lpc32xx_udc", "ck_usbd", &clk_usbd), 1132 CLKDEV_INIT("31020000.usbd", "ck_usbd", &clk_usbd),
1133 CLKDEV_INIT("lpc32xx_rtc", NULL, &clk_rtc), 1133 CLKDEV_INIT("lpc32xx_rtc", NULL, &clk_rtc),
1134}; 1134};
1135 1135