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authorLinus Walleij <linus.walleij@linaro.org>2012-08-29 14:27:02 -0400
committerLinus Walleij <linus.walleij@linaro.org>2012-09-05 02:49:00 -0400
commit487748ca3eea6f951185b4c5d0b0c02eea4d053b (patch)
tree1b877d140768f1cac1f267614f02bb791a3099ed /arch/arm/mach-ks8695
parent70adc3f32adc2fb90b0107c020678588e4cf9f51 (diff)
ARM: ks8695: use [readl|writel]_relaxed()
I have no clue why __raw* macros are used here, but I strongly suspect there is no good reason at all for this, so removing another bad example. Tested-by: Greg Ungerer <gerg@snapgear.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ks8695')
-rw-r--r--arch/arm/mach-ks8695/time.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c
index 6427b7c2c9fa..ae9daccca4c1 100644
--- a/arch/arm/mach-ks8695/time.c
+++ b/arch/arm/mach-ks8695/time.c
@@ -67,11 +67,11 @@ static unsigned long ks8695_gettimeoffset (void)
67 * interrupt. We solve this by ensuring that the counter has not 67 * interrupt. We solve this by ensuring that the counter has not
68 * reloaded between our two reads. 68 * reloaded between our two reads.
69 */ 69 */
70 elapsed = __raw_readl(KS8695_TMR_VA + KS8695_T1TC) + __raw_readl(KS8695_TMR_VA + KS8695_T1PD); 70 elapsed = readl_relaxed(KS8695_TMR_VA + KS8695_T1TC) + readl_relaxed(KS8695_TMR_VA + KS8695_T1PD);
71 do { 71 do {
72 tick2 = elapsed; 72 tick2 = elapsed;
73 intpending = __raw_readl(KS8695_IRQ_VA + KS8695_INTST) & (1 << KS8695_IRQ_TIMER1); 73 intpending = readl_relaxed(KS8695_IRQ_VA + KS8695_INTST) & (1 << KS8695_IRQ_TIMER1);
74 elapsed = __raw_readl(KS8695_TMR_VA + KS8695_T1TC) + __raw_readl(KS8695_TMR_VA + KS8695_T1PD); 74 elapsed = readl_relaxed(KS8695_TMR_VA + KS8695_T1TC) + readl_relaxed(KS8695_TMR_VA + KS8695_T1PD);
75 } while (elapsed > tick2); 75 } while (elapsed > tick2);
76 76
77 /* Convert to number of ticks expired (not remaining) */ 77 /* Convert to number of ticks expired (not remaining) */
@@ -106,14 +106,14 @@ static void ks8695_timer_setup(void)
106 unsigned long tmcon; 106 unsigned long tmcon;
107 107
108 /* disable timer1 */ 108 /* disable timer1 */
109 tmcon = __raw_readl(KS8695_TMR_VA + KS8695_TMCON); 109 tmcon = readl_relaxed(KS8695_TMR_VA + KS8695_TMCON);
110 __raw_writel(tmcon & ~TMCON_T1EN, KS8695_TMR_VA + KS8695_TMCON); 110 writel_relaxed(tmcon & ~TMCON_T1EN, KS8695_TMR_VA + KS8695_TMCON);
111 111
112 __raw_writel(tmout / 2, KS8695_TMR_VA + KS8695_T1TC); 112 writel_relaxed(tmout / 2, KS8695_TMR_VA + KS8695_T1TC);
113 __raw_writel(tmout / 2, KS8695_TMR_VA + KS8695_T1PD); 113 writel_relaxed(tmout / 2, KS8695_TMR_VA + KS8695_T1PD);
114 114
115 /* re-enable timer1 */ 115 /* re-enable timer1 */
116 __raw_writel(tmcon | TMCON_T1EN, KS8695_TMR_VA + KS8695_TMCON); 116 writel_relaxed(tmcon | TMCON_T1EN, KS8695_TMR_VA + KS8695_TMCON);
117} 117}
118 118
119static void __init ks8695_timer_init (void) 119static void __init ks8695_timer_init (void)
@@ -138,12 +138,12 @@ void ks8695_restart(char mode, const char *cmd)
138 soft_restart(0); 138 soft_restart(0);
139 139
140 /* disable timer0 */ 140 /* disable timer0 */
141 reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON); 141 reg = readl_relaxed(KS8695_TMR_VA + KS8695_TMCON);
142 __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); 142 writel_relaxed(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
143 143
144 /* enable watchdog mode */ 144 /* enable watchdog mode */
145 __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC); 145 writel_relaxed((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC);
146 146
147 /* re-enable timer0 */ 147 /* re-enable timer0 */
148 __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); 148 writel_relaxed(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
149} 149}