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authorLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 17:38:51 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 17:38:51 -0500
commit5ede3ceb7b2c2843e153a1803edbdc8c56655950 (patch)
tree4cfa82b619f7d39b671e4a2a213f4d040b09c486 /arch/arm/mach-kirkwood
parent6d889d03ab1417645e76e129834f76204bae37c0 (diff)
parent3e2762c8f1141ae8dc708034ea41d6827818c328 (diff)
Merge tag 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
New feature development This adds support for new features, and contains stuff from most platforms. A number of these patches could have fit into other branches, too, but were small enough not to cause too much confusion here. * tag 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (28 commits) mfd/db8500-prcmu: remove support for early silicon revisions ARM: ux500: fix the smp_twd clock calculation ARM: ux500: remove support for early silicon revisions ARM: ux500: update register files ARM: ux500: register DB5500 PMU dynamically ARM: ux500: update ASIC detection for U5500 ARM: ux500: support DB8520 ARM: picoxcell: implement watchdog restart ARM: OMAP3+: hwmod data: Add the default clockactivity for I2C ARM: OMAP3: hwmod data: disable multiblock reads on MMC1/2 on OMAP34xx/35xx <= ES2.1 ARM: OMAP: USB: EHCI and OHCI hwmod structures for OMAP4 ARM: OMAP: USB: EHCI and OHCI hwmod structures for OMAP3 ARM: OMAP: hwmod data: Add support for AM35xx UART4/ttyO3 ARM: Orion: Remove address map info from all platform data structures ARM: Orion: Get address map from plat-orion instead of via platform_data ARM: Orion: mbus_dram_info consolidation ARM: Orion: Consolidate the address map setup ARM: Kirkwood: Add configuration for MPP12 as GPIO ARM: Kirkwood: Recognize A1 revision of 6282 chip ARM: ux500: update the MOP500 GPIO assignments ...
Diffstat (limited to 'arch/arm/mach-kirkwood')
-rw-r--r--arch/arm/mach-kirkwood/addr-map.c137
-rw-r--r--arch/arm/mach-kirkwood/common.c19
-rw-r--r--arch/arm/mach-kirkwood/common.h1
-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h1
-rw-r--r--arch/arm/mach-kirkwood/mpp.c1
-rw-r--r--arch/arm/mach-kirkwood/mpp.h1
-rw-r--r--arch/arm/mach-kirkwood/pcie.c4
7 files changed, 49 insertions, 115 deletions
diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c
index 8d03bcef5182..e9a7180863d9 100644
--- a/arch/arm/mach-kirkwood/addr-map.c
+++ b/arch/arm/mach-kirkwood/addr-map.c
@@ -13,12 +13,12 @@
13#include <linux/mbus.h> 13#include <linux/mbus.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <mach/hardware.h> 15#include <mach/hardware.h>
16#include <plat/addr-map.h>
16#include "common.h" 17#include "common.h"
17 18
18/* 19/*
19 * Generic Address Decode Windows bit settings 20 * Generic Address Decode Windows bit settings
20 */ 21 */
21#define TARGET_DDR 0
22#define TARGET_DEV_BUS 1 22#define TARGET_DEV_BUS 1
23#define TARGET_SRAM 3 23#define TARGET_SRAM 3
24#define TARGET_PCIE 4 24#define TARGET_PCIE 4
@@ -36,118 +36,55 @@
36#define ATTR_SRAM 0x01 36#define ATTR_SRAM 0x01
37 37
38/* 38/*
39 * Helpers to get DDR bank info 39 * Description of the windows needed by the platform code
40 */ 40 */
41#define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3)) 41static struct __initdata orion_addr_map_cfg addr_map_cfg = {
42#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3)) 42 .num_wins = 8,
43 43 .remappable_wins = 4,
44/* 44 .bridge_virt_base = BRIDGE_VIRT_BASE,
45 * CPU Address Decode Windows registers 45};
46 */
47#define WIN_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
48#define WIN_CTRL_OFF 0x0000
49#define WIN_BASE_OFF 0x0004
50#define WIN_REMAP_LO_OFF 0x0008
51#define WIN_REMAP_HI_OFF 0x000c
52
53
54struct mbus_dram_target_info kirkwood_mbus_dram_info;
55
56static int __init cpu_win_can_remap(int win)
57{
58 if (win < 4)
59 return 1;
60
61 return 0;
62}
63
64static void __init setup_cpu_win(int win, u32 base, u32 size,
65 u8 target, u8 attr, int remap)
66{
67 void __iomem *addr = (void __iomem *)WIN_OFF(win);
68 u32 ctrl;
69
70 base &= 0xffff0000;
71 ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
72
73 writel(base, addr + WIN_BASE_OFF);
74 writel(ctrl, addr + WIN_CTRL_OFF);
75 if (cpu_win_can_remap(win)) {
76 if (remap < 0)
77 remap = base;
78
79 writel(remap & 0xffff0000, addr + WIN_REMAP_LO_OFF);
80 writel(0, addr + WIN_REMAP_HI_OFF);
81 }
82}
83
84void __init kirkwood_setup_cpu_mbus(void)
85{
86 void __iomem *addr;
87 int i;
88 int cs;
89 46
47static const struct __initdata orion_addr_map_info addr_map_info[] = {
90 /* 48 /*
91 * First, disable and clear windows. 49 * Windows for PCIe IO+MEM space.
92 */ 50 */
93 for (i = 0; i < 8; i++) { 51 { 0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE,
94 addr = (void __iomem *)WIN_OFF(i); 52 TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE
95 53 },
96 writel(0, addr + WIN_BASE_OFF); 54 { 1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE,
97 writel(0, addr + WIN_CTRL_OFF); 55 TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE
98 if (cpu_win_can_remap(i)) { 56 },
99 writel(0, addr + WIN_REMAP_LO_OFF); 57 { 2, KIRKWOOD_PCIE1_IO_PHYS_BASE, KIRKWOOD_PCIE1_IO_SIZE,
100 writel(0, addr + WIN_REMAP_HI_OFF); 58 TARGET_PCIE, ATTR_PCIE1_IO, KIRKWOOD_PCIE1_IO_BUS_BASE
101 } 59 },
102 } 60 { 3, KIRKWOOD_PCIE1_MEM_PHYS_BASE, KIRKWOOD_PCIE1_MEM_SIZE,
103 61 TARGET_PCIE, ATTR_PCIE1_MEM, KIRKWOOD_PCIE1_MEM_BUS_BASE
62 },
104 /* 63 /*
105 * Setup windows for PCIe IO+MEM space. 64 * Window for NAND controller.
106 */ 65 */
107 setup_cpu_win(0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE, 66 { 4, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE,
108 TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE); 67 TARGET_DEV_BUS, ATTR_DEV_NAND, -1
109 setup_cpu_win(1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE, 68 },
110 TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE);
111 setup_cpu_win(2, KIRKWOOD_PCIE1_IO_PHYS_BASE, KIRKWOOD_PCIE1_IO_SIZE,
112 TARGET_PCIE, ATTR_PCIE1_IO, KIRKWOOD_PCIE1_IO_BUS_BASE);
113 setup_cpu_win(3, KIRKWOOD_PCIE1_MEM_PHYS_BASE, KIRKWOOD_PCIE1_MEM_SIZE,
114 TARGET_PCIE, ATTR_PCIE1_MEM, KIRKWOOD_PCIE1_MEM_BUS_BASE);
115
116 /* 69 /*
117 * Setup window for NAND controller. 70 * Window for SRAM.
118 */ 71 */
119 setup_cpu_win(4, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE, 72 { 5, KIRKWOOD_SRAM_PHYS_BASE, KIRKWOOD_SRAM_SIZE,
120 TARGET_DEV_BUS, ATTR_DEV_NAND, -1); 73 TARGET_SRAM, ATTR_SRAM, -1
74 },
75 /* End marker */
76 { -1, 0, 0, 0, 0, 0 }
77};
121 78
79void __init kirkwood_setup_cpu_mbus(void)
80{
122 /* 81 /*
123 * Setup window for SRAM. 82 * Disable, clear and configure windows.
124 */ 83 */
125 setup_cpu_win(5, KIRKWOOD_SRAM_PHYS_BASE, KIRKWOOD_SRAM_SIZE, 84 orion_config_wins(&addr_map_cfg, addr_map_info);
126 TARGET_SRAM, ATTR_SRAM, -1);
127 85
128 /* 86 /*
129 * Setup MBUS dram target info. 87 * Setup MBUS dram target info.
130 */ 88 */
131 kirkwood_mbus_dram_info.mbus_dram_target_id = TARGET_DDR; 89 orion_setup_cpu_mbus_target(&addr_map_cfg, DDR_WINDOW_CPU_BASE);
132
133 addr = (void __iomem *)DDR_WINDOW_CPU_BASE;
134
135 for (i = 0, cs = 0; i < 4; i++) {
136 u32 base = readl(addr + DDR_BASE_CS_OFF(i));
137 u32 size = readl(addr + DDR_SIZE_CS_OFF(i));
138
139 /*
140 * Chip select enabled?
141 */
142 if (size & 1) {
143 struct mbus_dram_window *w;
144
145 w = &kirkwood_mbus_dram_info.cs[cs++];
146 w->cs_index = i;
147 w->mbus_attr = 0xf & ~(1 << i);
148 w->base = base & 0xffff0000;
149 w->size = (size | 0x0000ffff) + 1;
150 }
151 }
152 kirkwood_mbus_dram_info.num_cs = cs;
153} 90}
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 0bff4a916231..cc15426787b1 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -12,7 +12,6 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/serial_8250.h> 14#include <linux/serial_8250.h>
15#include <linux/mbus.h>
16#include <linux/ata_platform.h> 15#include <linux/ata_platform.h>
17#include <linux/mtd/nand.h> 16#include <linux/mtd/nand.h>
18#include <linux/dma-mapping.h> 17#include <linux/dma-mapping.h>
@@ -30,6 +29,7 @@
30#include <plat/orion_nand.h> 29#include <plat/orion_nand.h>
31#include <plat/common.h> 30#include <plat/common.h>
32#include <plat/time.h> 31#include <plat/time.h>
32#include <plat/addr-map.h>
33#include "common.h" 33#include "common.h"
34 34
35/***************************************************************************** 35/*****************************************************************************
@@ -73,8 +73,7 @@ unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
73void __init kirkwood_ehci_init(void) 73void __init kirkwood_ehci_init(void)
74{ 74{
75 kirkwood_clk_ctrl |= CGC_USB0; 75 kirkwood_clk_ctrl |= CGC_USB0;
76 orion_ehci_init(&kirkwood_mbus_dram_info, 76 orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
77 USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
78} 77}
79 78
80 79
@@ -85,7 +84,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
85{ 84{
86 kirkwood_clk_ctrl |= CGC_GE0; 85 kirkwood_clk_ctrl |= CGC_GE0;
87 86
88 orion_ge00_init(eth_data, &kirkwood_mbus_dram_info, 87 orion_ge00_init(eth_data,
89 GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM, 88 GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
90 IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk); 89 IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk);
91} 90}
@@ -99,7 +98,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
99 98
100 kirkwood_clk_ctrl |= CGC_GE1; 99 kirkwood_clk_ctrl |= CGC_GE1;
101 100
102 orion_ge01_init(eth_data, &kirkwood_mbus_dram_info, 101 orion_ge01_init(eth_data,
103 GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM, 102 GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
104 IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk); 103 IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk);
105} 104}
@@ -178,8 +177,7 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
178 if (sata_data->n_ports > 1) 177 if (sata_data->n_ports > 1)
179 kirkwood_clk_ctrl |= CGC_SATA1; 178 kirkwood_clk_ctrl |= CGC_SATA1;
180 179
181 orion_sata_init(sata_data, &kirkwood_mbus_dram_info, 180 orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
182 SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
183} 181}
184 182
185 183
@@ -221,7 +219,6 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
221 mvsdio_data->clock = 100000000; 219 mvsdio_data->clock = 100000000;
222 else 220 else
223 mvsdio_data->clock = 200000000; 221 mvsdio_data->clock = 200000000;
224 mvsdio_data->dram = &kirkwood_mbus_dram_info;
225 kirkwood_clk_ctrl |= CGC_SDIO; 222 kirkwood_clk_ctrl |= CGC_SDIO;
226 kirkwood_sdio.dev.platform_data = mvsdio_data; 223 kirkwood_sdio.dev.platform_data = mvsdio_data;
227 platform_device_register(&kirkwood_sdio); 224 platform_device_register(&kirkwood_sdio);
@@ -285,8 +282,7 @@ static void __init kirkwood_xor0_init(void)
285{ 282{
286 kirkwood_clk_ctrl |= CGC_XOR0; 283 kirkwood_clk_ctrl |= CGC_XOR0;
287 284
288 orion_xor0_init(&kirkwood_mbus_dram_info, 285 orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
289 XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
290 IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01); 286 IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
291} 287}
292 288
@@ -364,7 +360,6 @@ static struct resource kirkwood_i2s_resources[] = {
364}; 360};
365 361
366static struct kirkwood_asoc_platform_data kirkwood_i2s_data = { 362static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
367 .dram = &kirkwood_mbus_dram_info,
368 .burst = 128, 363 .burst = 128,
369}; 364};
370 365
@@ -430,6 +425,8 @@ static char * __init kirkwood_id(void)
430 } else if (dev == MV88F6282_DEV_ID) { 425 } else if (dev == MV88F6282_DEV_ID) {
431 if (rev == MV88F6282_REV_A0) 426 if (rev == MV88F6282_REV_A0)
432 return "MV88F6282-Rev-A0"; 427 return "MV88F6282-Rev-A0";
428 else if (rev == MV88F6282_REV_A1)
429 return "MV88F6282-Rev-A1";
433 else 430 else
434 return "MV88F6282-Rev-Unsupported"; 431 return "MV88F6282-Rev-Unsupported";
435 } else { 432 } else {
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 1529280246d6..9071a397136d 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -30,7 +30,6 @@ void kirkwood_init(void);
30void kirkwood_init_early(void); 30void kirkwood_init_early(void);
31void kirkwood_init_irq(void); 31void kirkwood_init_irq(void);
32 32
33extern struct mbus_dram_target_info kirkwood_mbus_dram_info;
34void kirkwood_setup_cpu_mbus(void); 33void kirkwood_setup_cpu_mbus(void);
35 34
36void kirkwood_enable_pcie(void); 35void kirkwood_enable_pcie(void);
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index 010bdeb4ac5f..fede3d503efa 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -135,4 +135,5 @@
135 135
136#define MV88F6282_DEV_ID 0x6282 136#define MV88F6282_DEV_ID 0x6282
137#define MV88F6282_REV_A0 0 137#define MV88F6282_REV_A0 0
138#define MV88F6282_REV_A1 1
138#endif 139#endif
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index cc431fa22ccb..0c6ad63f10c7 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -10,7 +10,6 @@
10#include <linux/gpio.h> 10#include <linux/gpio.h>
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/mbus.h>
14#include <linux/io.h> 13#include <linux/io.h>
15#include <mach/hardware.h> 14#include <mach/hardware.h>
16#include <plat/mpp.h> 15#include <plat/mpp.h>
diff --git a/arch/arm/mach-kirkwood/mpp.h b/arch/arm/mach-kirkwood/mpp.h
index ac787957e2d9..e8fda45c0736 100644
--- a/arch/arm/mach-kirkwood/mpp.h
+++ b/arch/arm/mach-kirkwood/mpp.h
@@ -102,6 +102,7 @@
102#define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 1, 0, 1, 1, 1, 1 ) 102#define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 1, 0, 1, 1, 1, 1 )
103 103
104#define MPP12_GPO MPP( 12, 0x0, 0, 1, 1, 1, 1, 1, 1 ) 104#define MPP12_GPO MPP( 12, 0x0, 0, 1, 1, 1, 1, 1, 1 )
105#define MPP12_GPIO MPP( 12, 0x0, 1, 1, 0, 0, 0, 1, 0 )
105#define MPP12_SD_CLK MPP( 12, 0x1, 0, 1, 1, 1, 1, 1, 1 ) 106#define MPP12_SD_CLK MPP( 12, 0x1, 0, 1, 1, 1, 1, 1, 1 )
106#define MPP12_AU_SPDIF0 MPP( 12, 0xa, 0, 1, 0, 0, 0, 0, 1 ) 107#define MPP12_AU_SPDIF0 MPP( 12, 0xa, 0, 1, 0, 0, 0, 0, 1 )
107#define MPP12_SPI_MOSI MPP( 12, 0xb, 0, 1, 0, 0, 0, 0, 1 ) 108#define MPP12_SPI_MOSI MPP( 12, 0xb, 0, 1, 0, 0, 0, 0, 1 )
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index 74b992d810ea..fb451bfe478b 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -11,12 +11,12 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/pci.h> 12#include <linux/pci.h>
13#include <linux/slab.h> 13#include <linux/slab.h>
14#include <linux/mbus.h>
15#include <video/vga.h> 14#include <video/vga.h>
16#include <asm/irq.h> 15#include <asm/irq.h>
17#include <asm/mach/pci.h> 16#include <asm/mach/pci.h>
18#include <plat/pcie.h> 17#include <plat/pcie.h>
19#include <mach/bridge-regs.h> 18#include <mach/bridge-regs.h>
19#include <plat/addr-map.h>
20#include "common.h" 20#include "common.h"
21 21
22void kirkwood_enable_pcie(void) 22void kirkwood_enable_pcie(void)
@@ -208,7 +208,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
208 */ 208 */
209 orion_pcie_set_local_bus_nr(pp->base, sys->busnr); 209 orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
210 210
211 orion_pcie_setup(pp->base, &kirkwood_mbus_dram_info); 211 orion_pcie_setup(pp->base);
212 212
213 return 1; 213 return 1;
214} 214}