ARM: Remove dependency of plat-orion GPIO code on mach directory includes.

This patch makes the various mach dirs that use the plat-orion GPIO
code pass in GPIO-related platform info (GPIO controller base address,
secondary base IRQ number, etc) explicitly, instead of having
plat-orion get those values by including a mach dir include file --
the latter mechanism is problematic if you want to support multiple
ARM platforms in the same kernel image.

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>

1 files changed, 6 insertions, 16 deletions

diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
index 28020abf49e1..cbdb5863d13b 100644
--- a/arch/arm/mach-kirkwood/irq.c
+++ b/arch/arm/mach-kirkwood/irq.c
@@ -27,31 +27,21 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 
 void __init kirkwood_init_irq(void)
 {
-        int i;
-
         orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
         orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
 
         /*
-         * Mask and clear GPIO IRQ interrupts.
+         * Initialize gpiolib for GPIOs 0-49.
          */
-        writel(0, GPIO_LEVEL_MASK(0));
-        writel(0, GPIO_EDGE_MASK(0));
-        writel(0, GPIO_EDGE_CAUSE(0));
-        writel(0, GPIO_LEVEL_MASK(32));
-        writel(0, GPIO_EDGE_MASK(32));
-        writel(0, GPIO_EDGE_CAUSE(32));
-
-        for (i = IRQ_KIRKWOOD_GPIO_START; i < NR_IRQS; i++) {
-                set_irq_chip(i, &orion_gpio_irq_chip);
-                set_irq_handler(i, handle_level_irq);
-                irq_desc[i].status |= IRQ_LEVEL;
-                set_irq_flags(i, IRQF_VALID);
-        }
+        orion_gpio_init(0, 32, GPIO_LOW_VIRT_BASE, 0,
+                        IRQ_KIRKWOOD_GPIO_START);
         set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler);
         set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler);
         set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler);
         set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler);
+
+        orion_gpio_init(32, 18, GPIO_HIGH_VIRT_BASE, 0,
+                        IRQ_KIRKWOOD_GPIO_START + 32);
         set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler);
         set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler);
         set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23, gpio_irq_handler);