diff options
author | Andrew Lunn <andrew@lunn.ch> | 2011-12-15 02:15:07 -0500 |
---|---|---|
committer | Mike Turquette <mturquette@linaro.org> | 2012-05-08 19:33:39 -0400 |
commit | 2f129bf4aab684bef1e82e747b709a5025ecb698 (patch) | |
tree | 4be6e04fc306cfad25b3b86f831cd4d462c10f44 /arch/arm/mach-kirkwood/include | |
parent | f0948f59dbc8e725a96ba16da666e8f5cdd43ba8 (diff) |
ARM: Orion: Add clocks using the generic clk infrastructure.
Add tclk as a fixed rate clock for all platforms. In addition, on
kirkwood, add a gated clock for most of the clocks which can be gated.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
[mturquette@linaro.org: removed redundant CLKDEV_LOOKUP from Kconfig]
[mturquette@linaro.org: removed redundant clk.h from mach-dove/common.c]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'arch/arm/mach-kirkwood/include')
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/bridge-regs.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h index 957bd7997d7e..3eee37a3b501 100644 --- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h +++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h | |||
@@ -43,6 +43,22 @@ | |||
43 | #define L2_WRITETHROUGH 0x00000010 | 43 | #define L2_WRITETHROUGH 0x00000010 |
44 | 44 | ||
45 | #define CLOCK_GATING_CTRL (BRIDGE_VIRT_BASE | 0x11c) | 45 | #define CLOCK_GATING_CTRL (BRIDGE_VIRT_BASE | 0x11c) |
46 | #define CGC_BIT_GE0 (0) | ||
47 | #define CGC_BIT_PEX0 (2) | ||
48 | #define CGC_BIT_USB0 (3) | ||
49 | #define CGC_BIT_SDIO (4) | ||
50 | #define CGC_BIT_TSU (5) | ||
51 | #define CGC_BIT_DUNIT (6) | ||
52 | #define CGC_BIT_RUNIT (7) | ||
53 | #define CGC_BIT_XOR0 (8) | ||
54 | #define CGC_BIT_AUDIO (9) | ||
55 | #define CGC_BIT_SATA0 (14) | ||
56 | #define CGC_BIT_SATA1 (15) | ||
57 | #define CGC_BIT_XOR1 (16) | ||
58 | #define CGC_BIT_CRYPTO (17) | ||
59 | #define CGC_BIT_PEX1 (18) | ||
60 | #define CGC_BIT_GE1 (19) | ||
61 | #define CGC_BIT_TDM (20) | ||
46 | #define CGC_GE0 (1 << 0) | 62 | #define CGC_GE0 (1 << 0) |
47 | #define CGC_PEX0 (1 << 2) | 63 | #define CGC_PEX0 (1 << 2) |
48 | #define CGC_USB0 (1 << 3) | 64 | #define CGC_USB0 (1 << 3) |