diff options
author | Andrew Lunn <andrew@lunn.ch> | 2011-12-23 19:24:24 -0500 |
---|---|---|
committer | Mike Turquette <mturquette@linaro.org> | 2012-05-08 19:33:56 -0400 |
commit | 452503ebc7cc4cce5b9e52cf2f03255365a53234 (patch) | |
tree | ecf09f091b74cad5d40e1d10cbf6df35ad97ef15 /arch/arm/mach-kirkwood/common.c | |
parent | 4574b886698dfad6209102fed6136622b5fe1c21 (diff) |
ARM: Orion: Eth: Add clk/clkdev support.
The t_clk is moved from the shared part of the ethernet driver into
the per port section. Each port can have its own gated clock, which it
needs to enable/disable, as oppossed to there being one clock shared
by all ports. In practice, only kirkwood supports this at the moment.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'arch/arm/mach-kirkwood/common.c')
-rw-r--r-- | arch/arm/mach-kirkwood/common.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index 476e0b941db7..c22354405297 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c | |||
@@ -86,14 +86,14 @@ static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx) | |||
86 | 86 | ||
87 | void __init kirkwood_clk_init(void) | 87 | void __init kirkwood_clk_init(void) |
88 | { | 88 | { |
89 | struct clk *runit; | 89 | struct clk *runit, *ge0, *ge1; |
90 | 90 | ||
91 | tclk = clk_register_fixed_rate(NULL, "tclk", NULL, | 91 | tclk = clk_register_fixed_rate(NULL, "tclk", NULL, |
92 | CLK_IS_ROOT, kirkwood_tclk); | 92 | CLK_IS_ROOT, kirkwood_tclk); |
93 | 93 | ||
94 | runit = kirkwood_register_gate("runit", CGC_BIT_RUNIT); | 94 | runit = kirkwood_register_gate("runit", CGC_BIT_RUNIT); |
95 | kirkwood_register_gate("ge0", CGC_BIT_GE0); | 95 | ge0 = kirkwood_register_gate("ge0", CGC_BIT_GE0); |
96 | kirkwood_register_gate("ge1", CGC_BIT_GE1); | 96 | ge1 = kirkwood_register_gate("ge1", CGC_BIT_GE1); |
97 | kirkwood_register_gate("sata0", CGC_BIT_SATA0); | 97 | kirkwood_register_gate("sata0", CGC_BIT_SATA0); |
98 | kirkwood_register_gate("sata1", CGC_BIT_SATA1); | 98 | kirkwood_register_gate("sata1", CGC_BIT_SATA1); |
99 | kirkwood_register_gate("usb0", CGC_BIT_USB0); | 99 | kirkwood_register_gate("usb0", CGC_BIT_USB0); |
@@ -110,6 +110,8 @@ void __init kirkwood_clk_init(void) | |||
110 | /* clkdev entries, mapping clks to devices */ | 110 | /* clkdev entries, mapping clks to devices */ |
111 | orion_clkdev_add(NULL, "orion_spi.0", runit); | 111 | orion_clkdev_add(NULL, "orion_spi.0", runit); |
112 | orion_clkdev_add(NULL, "orion_spi.1", runit); | 112 | orion_clkdev_add(NULL, "orion_spi.1", runit); |
113 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", ge0); | ||
114 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", ge1); | ||
113 | } | 115 | } |
114 | 116 | ||
115 | /***************************************************************************** | 117 | /***************************************************************************** |
@@ -131,7 +133,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data) | |||
131 | 133 | ||
132 | orion_ge00_init(eth_data, | 134 | orion_ge00_init(eth_data, |
133 | GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM, | 135 | GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM, |
134 | IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk); | 136 | IRQ_KIRKWOOD_GE00_ERR); |
135 | } | 137 | } |
136 | 138 | ||
137 | 139 | ||
@@ -145,7 +147,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data) | |||
145 | 147 | ||
146 | orion_ge01_init(eth_data, | 148 | orion_ge01_init(eth_data, |
147 | GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM, | 149 | GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM, |
148 | IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk); | 150 | IRQ_KIRKWOOD_GE01_ERR); |
149 | } | 151 | } |
150 | 152 | ||
151 | 153 | ||